Example: stock market
Two Lvpecl Output High Performance Clock
Found 2 free book(s)High Performance, 3.2 GHz, 14-Output Fanout Buffer Data ...
www.analog.comHigh Performance, 3.2 GHz, 14-Output Fanout Buffer Data Sheet HMC7043 ... including CML, LVDS, LVPECL, and LVCMOS, and different bias conditions to adjust for varying board insertion losses. One of the unique features of the HMC7043 is the independent ... fundamental frequency of the clock input (f O), two SYSREF clocks (off)
Spartan-3E FPGA Family Data Sheet (DS312)
www.xilinx.comstandards, including four high-performance differential standards. Double Data-Rate (DDR) registers are included. † Block RAM provides data storage in the form of 18-Kbit dual-port blocks. † Multiplier Blocks accept two 18-bit binary numbers as inputs and calculate the product. † Digital Clock Manager (DCM) Blocks provide