Software Developer Guide - Xilinx
Zynq UltraScale+ MPSoCSoftware Developer GuideUG1137 ( ) July 1, 2020Revision HistoryThe following table shows the revision history for this Summary07/01/2020 Version 10: Platform Management Unit FirmwareUpdated PMU Firmware Build Flags to add a new 12: ResetUpdated RPU Subsystem Restart for RPU only restartsupport E: XilSecure Library Additional H: XilFPGA Library Additional Version Embedded FlowUpdated SDK flows to Vitis Embedded Flow throughout Version 4: Software StackUpdated Multimedia Stack 7: System Boot and ConfigurationUpdated Miscellaneous FunctionsChapter 10: Platform Management Unit FirmwareAdded CSU/PMU Register Access and updated PMUFirmware Build FlagsChapter 11: Power Management FrameworkUpdated Sub-system Power Manag
Vitis Embedded Flow Updated SDK flows to Vitis Embedded Flow throughout the document. 06/26/2019 Version 10.0 Chapter 4: Software Stack Updated Multimedia Stack Overview. Chapter 7: System Boot and Configuration Updated Miscellaneous Functions Chapter 10: Platform Management Unit Firmware Added CSU/PMU Register Access and updated PMU
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