Tutorial on Digital Phase-Locked Loops - CppSim
Tutorial onDigital Phase-Locked LoopsCICC 2009Michael H. PerrottSeptember 2009Copyright 2009 by Michael H. PerrottWhy Are Digital Phase-Locked Loops Interesting? Performance is important-Phase noise can limit wireless transceiver performance- jitter can be a problem for Digital processors The standard analog PLL implementation is problematic in many applications-Analog building blocks on a mostly Digital chip pose design and verification challenges-The cost of implementation is becoming too high ...Can Digital Phase-Locked Loops offer excellent performance with a lower cost of implementation?Just Enough PLL Background.
M.H. Perrott 2 Why Are Digital Phase-Locked Loops Interesting? Performance is important-Phase noise can limit wireless transceiver performance-Jitter can be a problem for digital processors The standard analog PLL implementation is problematic in many applications-Analog building blocks on a mostly digital chip pose - design and verification challenges
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