Transcription of 2010 Design Engineer’s Guide to OpenVPX
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2010 Design Engineer’s Guide to OpenVPX
OpenVPX From Concept to SpecificationTransitioning to OpenVPX for Next-Generation C4 ISR Systems Putting OpenVPX to WorkWho s Who In OpenVPX2010 Design Engineer sGuide to OpenVPX2010 Design Engineer sGuide to OpenVPXCovTo C+ AIntroSupplement to Embedded TechnologyFree Info at C+ AIntroOpenVPX Design Guide , September the Show BeginVPX is like a three act play. Act one was the launching of anew high density platform for critical embedded comput-ing applications. Leveraging the wildly popular VMEbus in 3 Uand 6U Eurocard formats, VPX added the capability of usinghigh speed serial switch fabric technologies such as Ethernet,PCI Express, serial RapidIO, and others, that can be configuredin various backplane topologies. VPX also greatly increased thenumber of backplane pins to handle more data traffic and userI/O making it more effectivefor today s two was the addition ofan architectural framework thatmanages and constrains mod-ule and backplane designs,including defining pin outs,and that sets interoperabilitypoints within VPX while main-taining full compliance.
scope of the project. Much work is still ahead as addition-al framework alternatives are defined to meet specific needs of new applications of the VPX technology. Act three is the rollout of products, from boards to complete systems, that follow the family of VPX specifications. Over 30 companies have announced, or plan to announce, products
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