Transcription of A COMPARATOR WITH REDUCED OFFSET VOLTAGE …
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International Journal of Advanced Research in Computer Engineering & Technology (IJARCET) volume 3 issue 11, november 2014 3745 ISSN: 2278 1323 All Rights Reserved 2014 IJARCET A COMPARATOR WITH REDUCED OFFSET VOLTAGE & DELAY TIME IN 130nm CMOS Ms. Ankita Bhatia1, Mishra2 1 Research Scholar, EC Dept., Bhai Maha Singh College of Engineering, Muktsar, Punjab 2 Assistant Professor EC Dept., Bhai Maha Singh College of Engineering, Muktsar, Punjab Abstract: Speed, low- OFFSET VOLTAGE , and resolution are some essential factors for high-speed applications. The COMPARATOR circuit with preamplifier increases the power dissipation, as it requires higher amount of current than the latch circuitry.
International Journal of Advanced Research in Computer Engineering & Technology (IJARCET) Volume 3 Issue 11, November 2014 3745 ISSN: 2278 – 1323 All Rights ...
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