Transcription of ATmega32A - Microchip Technology
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ATmega32A . megaAVR Data Sheet Introduction The ATmega32A is a low power, CMOS 8-bit microcontrollers based on the AVR enhanced RISC archi- tecture. The ATmega32A is a 40/44-pins device with 32 KB Flash, 2 KB SRAM and 1 KB EEPROM. By exe- cuting instructions in a single clock cycle, the devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consump- tion versus processing speed. Features High-performance, Low-power AVR 8-bit Microcontroller Advanced RISC Architecture 131 Powerful Instructions Most Single-clock Cycle Execution 32 8 General Purpose Working Registers Fully Static Operation Up to 16 MIPS Throughput at 16 MHz On-chip 2-cycle Multiplier High Endurance Non-volatile Memory segments 32 Kbytes of In-System Self-programmable Flash program memory 1024 Bytes EEPROM.
• JTAG (IEEE std. 1149.1 Compliant) Interface – Boundary-scan Capabilities According to the JTAG Standard – Extensive On-chip Debug Support – Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
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