Transcription of AXI DMA v7 - Xilinx
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AXI DMA v7 - Xilinx
AXI DMA LogiCORE IP Product Guide Vivado Design Suite PG021 June 14, 2019. Table of Contents IP Facts Chapter 1: Overview Feature Summary.. 6. Applications .. 7. Licensing and Ordering .. 7. Chapter 2: Product Specification Performance.. 8. Resource Utilization.. 10. Port Descriptions .. 10. Register Space .. 11. Scatter Gather Descriptor .. 38. Multichannel DMA Support .. 56. Chapter 3: Designing with the Core Typical System Interconnect .. 68. Clocking.. 69. Resets .. 70. Programming Sequence.. 70. Chapter 4: Design Flow Steps Customizing and Generating the Core .. 75. Constraining the Core .. 83. Simulation.
The Xilinx® LogiCORE™ IP AXI Direct Memory Access (AXI DMA) core is a soft Xilinx IP core for use with the Xilinx Vivado® Design Suite. The ... results of the characterization runs. Table 2-1: Maximum Frequencies Family Speed Grade Fmax (MHz) AXI4 AXI4-Stream AXI4-Lite Virtex®-7 –1 200 200 180 Kintex®-7 200 200 180
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