Transcription of BEOL Interconnect Innovations for Improving Performance
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BEOL Interconnect Innovations for Improving Performance
BEOL Interconnect Innovations for Improving Performance Paul Besser, PhD Formerly Senior Technology Director at Lam Research Currently Director of Emerging Technologies at ARM February 23, 2017 Paul Besser, NCCAVS Symposium in San Jose, CA Acknowledgements Lam Research Hui-Jung Wu, Justin Jiang, Kaushik Chattopadhyay, Lee Brogan, Natalia Doubina, Nagraj Shankar, Cheng-Kai Li, and Larry Zhao imec Houman Zahedmanesh, Kristof Croes, Ivan Ciofi GLOBALFOUNDRIES Todd Ryan ARM Saurabh Sinha, Brian Cline, Greg Yeric February 23, 2017 Paul Besser, NCCAVS Symposium in San Jose, CA 2 Market Needs Drive Requirements and Technology Innovations 3 Power, Performance , cost/area (PPA) are driving our industry Customers demand the highest performing processors Performance Power Cost/Area Slide from Paul Besser, Semicon Korea 2014 A4 A5 A6 A7 A8 A9 32nm HKMG 28nm HKMG 20nm HKMG 14nm FinFET February 23, 2017 Paul Besser, NCCAVS Symposium in San Jose, CA Innovations in Silicon Manufacturing F
Feb 23, 2017 · •A combination of high etch selectivity ESL and thin hermetic Cu barrier enables DB scaling •A high selectivity ESL can provide better control of unlanded via over etch and enable TiN wet removal with protected via bottom • Replacing SiCN with AlN + SiCO is a offers a highly conformal stack with high etch selectivity, k eff
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