Transcription of Binary Adder - Michigan State University
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Binary Adder - Michigan State University
ECE 410, Prof. A. MasonLecture Notes Adder Binary Addition single bit addition sum of 2 Binary numbers can be larger than either number need a carry-out to store the overflow Half- Adder 2 inputs (x and y) and 2 outputs (sumand carry)x y x + y ( Binary sum)0 + 0 = 00 + 1 = 11 + 0 = 11 + 1 = 10 ( Binary , 2 in base-10)x y s c0 0 0 00 1 1 01 0 1 01 1 0 1s = x yc = x yXORANDHA xycshalf- Adder symbolECE 410, Prof. A. MasonLecture Notes Circuits Simple Logic using XOR gate Most Basic Logic NAND and NOR only circuitsx y s c0 0 0 00 1 1 01 0 1 01 1 0 1s = x yc = x yTake-home Questions:Which of these 3 half-adders will be fastest? slowest? why??Which has fewest transistors? Which transition has the critical delay?ECE 410, Prof. A. MasonLecture Notes When adding more than one bit, must consider the carry of the previous bit full- Adder has a carry-in input Full- Adder Equation Full- Adder Truth Tableciai+ bici+1sifor every i-th bitcarry-in+ a+ b= carry-out, sumaibicis ci+10 0 0 0 00 1 0 1 01 0 0 1 01 1 0 0 10 0 1 1 00 1 1 0 11 0 1 0 11 1 1 1 1si= ai bi cici+1= ai bi+ ci (ai bi)ci+1= ai bi+ ci (ai+ bi)if not trying to reuse the ai biterm from sum, can writeFA+aifull- Adder symbolbicici+1siECE 410, Prof.
ECE 410, Prof. A. Mason Lecture Notes 12.12 Carry Look-Ahead Adder • CLA designed to overcome delay issue in R-C Adders – eliminates the ripple (cascading) effect of the carry bits • Algorithm based calculating all carryterms at once •Introduces generate and propagate signals – rewrite c i+1 = a i • b i + c i • (a i ⊕b i) Æc i+ ...
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