BSS138 N-Channel Logic Level Enhancement Mode …

2005 Semiconductor Components Industries, LLC. September-2017, Rev. 3 Publication Order Number: BSS138 /DBSS138 N-Channel Logic Level Enhancement Mode field effect TransistorGeneral Description These N-Channel Enhancement mode field effect transistors are produced using ON Semicondcutor s proprietary, high cell density, DMOS technology. These products have been designed to minimize on-state resistance while provide rugged, reliable, and fast switching products are particularly suited for low voltage, low current applications such as small servo motor control, power MOSFET gate drivers, and other switching applications. Features A, 50 V. RDS(ON) = @ VGS = 10 VRDS(ON) = @ VGS = V High density cell design for extremely low RDS(ON) Rugged and Reliable Compact industry standard SOT-23 surface mountpackageGDSSOT-23 DSGA bsolute Maximum Ratings TA=25oC unless otherwise notedSymbolParameterRatings UnitsVDSSD rain-Source Voltage50 VVGSSGate-Source Voltage 20V ID Drain Current Continuous (Note 1) Power Dissipation (Note 1) PD Derate Above 25 C mW/ C TJ, TSTG Operating and Storage Ju

2005 Semiconductor Components Industries, LLC. September-2017, Rev. 3 Publication Order Number: BSS138/D BSS138 N-Channel Logic Level Enhancement Mode Field Effect Transistor

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  Dome, Field, Levels, Transistor, Enhancement, Effect, Channel, Logic, Channel logic level enhancement mode, Channel logic level enhancement mode field effect transistor

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