Transcription of CHAPTER 12: PRINTED CIRCUIT BOARD (PCB) DESIGN ISSUES
{{id}} {{{paragraph}}}
PRINTER CIRCUIT BOARD ISSUES CHAPTER 12: PRINTED CIRCUIT BOARD (PCB) DESIGN ISSUES INTRODUCTION SECTION : PARTITIONING SECTION : TRACES RESISTANCE OF CONDUCTORS VOLTAGE DROP IN SIGNAL LEADS "KELVIN FEEDBACK" SIGNAL RETURN CURRENTS GROUND NOISE AND GROUND LOOPS GROUND ISOLATION TECHNIQUES STATIC PCB EFFECTS SAMPLE MINIDIP AND SOIC OP AMP PCB GUARD LAYOUTS DYNAMIC PCB EFFECTS INDUCTANCE STRAY INDUCTANCE MUTUAL INDUCTANCE PARASITIC EFFECTS IN INDUCTORS Q OR "QUALITY FACTORS" DON'T OVERLOOK ANYTHING STRAY CAPACITANCE CAPACITATIVE NOISE AND FARADAY SHIELDS BUFFERING ADCs AGAINST LOGIC NOISE HIGH CIRCUIT IMPEDANCES ARE SUSCEPTIBLE TO NOISE PICKUP SKIN EFFECT TRANSMISSION LINES DESIGN PCBs THOUGHTFULLY DESIGNNING+B46 CONTROLLED IMPEDANCE TRACES ON PCBs
basic linear design section 12.3: grounding 12.53 star ground 12.54 separate analog and digital grounds 12.55 ground planes 12.56 grounding and decoupling mixed signals ics with low digital content 12.60 treat the adc digital outputs with care 12.62 sampling clock considerations 12.64 the origins of the confusion about mixed signal
Domain:
Source:
Link to this page:
Please notify us if you found a problem with this document:
{{id}} {{{paragraph}}}