Transcription of CHAPTER 12: PRINTED CIRCUIT BOARD (PCB) DESIGN ISSUES
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CHAPTER 12: PRINTED CIRCUIT BOARD (PCB) DESIGN ISSUES
PRINTER CIRCUIT BOARD ISSUES CHAPTER 12: PRINTED CIRCUIT BOARD (PCB) DESIGN ISSUES INTRODUCTION SECTION : PARTITIONING SECTION : TRACES RESISTANCE OF CONDUCTORS VOLTAGE DROP IN SIGNAL LEADS "KELVIN FEEDBACK" SIGNAL RETURN CURRENTS GROUND NOISE AND GROUND LOOPS GROUND ISOLATION TECHNIQUES STATIC PCB EFFECTS SAMPLE MINIDIP AND SOIC OP AMP PCB GUARD LAYOUTS DYNAMIC PCB EFFECTS INDUCTANCE STRAY INDUCTANCE MUTUAL INDUCTANCE PARASITIC EFFECTS IN INDUCTORS Q OR "QUALITY FACTORS" DON'T OVERLOOK ANYTHING STRAY CAPACITANCE CAPACITATIVE NOISE AND FARADAY SHIELDS BUFFERING ADCs AGAINST LOGIC NOISE HIGH CIRCUIT IMPEDANCES ARE SUSCEPTIBLE TO NOISE PICKUP SKIN EFFECT TRANSMISSION LINES DESIGN PCBs THOUGHTFULLY DESIGNNING+B46 CONTROLLED IMPEDANCE TRACES ON PCBs
design pcbs thoughtfully 12.36 designning+b46 controlled impedance traces on pcbs 12.36 microstrip pcb transmission lines 12.38 some microstrip guidelines 12.39 symmetric stripline pcb transmission lines 12.40 some pros and cons of embedding traces 12.42 dealing with high speed logic 12.43 low voltage differential signalling (lvds) 12.49
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