Clocked and Asynchronous FIFO Characterization and …

Clocked and Asynchronous FIFOC haracterization and ComparisonHoSuk HanKenneth S. StevensElectrical and Computer EngineeringUniversity of UtahAbstract Heterogeneous blocks, IP reuse, network-on-chipinterconnect, and multi-frequency design are becoming moreprevalent in integrated circuit design. Communication amongstthese blocks typically employs first-in-first-out ( fifo ) bufferingfor flow control. This paper characterizes and evaluates severalcommon designs in order to determine which structure is bestfor various specific applications. Two Clocked and four clocklessasynchronous fifo designs are compared varying capacity,bit width, and structural configurations. The fifo layoutsare characterized in the IBM 65nm 10sf process for latency,throughput, area, and power. First order models are created toaid in CAD for fifo synthesis, modeling, and optimization.

Clocked and Asynchronous FIFO Characterization and Comparison HoSuk Han Kenneth S. Stevens Electrical and Computer Engineering University of Utah

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  Comparison, Characterization, Asynchronous, Fifo, Clocked and asynchronous fifo characterization and, Clocked, Clocked and asynchronous fifo characterization and comparison

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