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CUDA C/C++ Streams and Concurrency - Nvidia

CUDA C/C++ Streams and ConcurrencySteve RennichNVIDIAC oncurrencyThe ability to perform multiple CUDA operations simultaneously(beyond multi-threaded parallelism)CUDA Kernel <<<>>>cudaMemcpyAsync (HostToDevice)cudaMemcpyAsync (DeviceToHost)Operations on the CPUF ermi architecture can simultaneously support(compute capability +)Up to 16 CUDA kernels on GPU2 cudaMemcpyAsyncs (must be in different directions)Computation on the CPUS treamsStreamA sequence of operations that execute in issue-order on the GPUP rogramming model used to effect concurrencyCUDA operations in different Streams may run concurrentlyCUDA operations from different Streams may be interleavedK1K2K3K4 Concurrency ExampleSerialConcurrent overlap kernel and D2H copycudaMemcpyAsync(H2D)cudaMemcpyAsync( D2H)Kernel<<<>>>timecudaMemcpyAsync(H2D) performance improvementstreamsHD2K2HD3DH2 Amount of ConcurrencySerial (1x)2-way Concurrency (up to 2x)3-way Concurrency (up to 3x)4-way Concurrency (3x+)4+ way concurrencyKernel <<< >>>cudaMemcpyAsync(H2D)cudaMemcpyAsync(D2 H)K1K2K3K4cudaMemcpyAsync(H2D)DH1DH3DH4K 1K3K4HD1DH1DH2DH3DH4HD2HD4K1K2K3HD1DH1DH 2DH3K4 on on on CPUE xample Tiled DGEMMCPU (4core Westmere x5670 GHz, MKL)43 GflopsGPU (C2070) Serial : 125 Gflops ( )2-way : 177 Gflops ( )3-way : 262 Gfllops ( )GPU + CPU4-way con.

Concurrency Guidelines Code to programming model – Streams Future devices will continually improve HW representation of streams model Pay attention to issue order Can make a difference Pay attention to resources and operations which can break concurrency Anything in the default stream Events & synchronization Stream queries L1/Shared ...

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