Transcription of DM74LS14 Hex Inverter with Schmitt Trigger Inputs
{{id}} {{{paragraph}}}
Example: confidence
DM74LS14 Hex Inverter with Schmitt Trigger Inputs
2000 Fairchild Semiconductor 1986 Revised March 2000DM74LS14 Hex Inverter with Schmitt Trigger InputsDM74LS14 Hex Inverter with Schmitt Trigger InputsGeneral DescriptionThis device contains six independent gates each of whichperforms the logic INVERT function. Each input has hyster-esis which increases the noise immunity and transforms aslowly changing input signal to a fast changing, jitter freeoutput. Ordering Code:Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering DiagramFunction TableY = AH = HIGH Logic LevelL = LOW Logic LevelOrder NumberPackage NumberPackage DescriptionDM74LS14MM14A14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, NarrowDM74LS14 SJM14D14-Lead Small Outline Package (SOP), EIAJ TYPE II, WideDM74LS14NN14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, Maximum Ratings(Note 1)Note 1: The Absolute Maximum Ratings are those values beyond whichthe safety of the device cannot be guaranteed.
5 www.fairchildsemi.com DM74LS14 Hex Inverter with Schmitt Trigger Inputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Loading..
Tags:
Information
Domain:
Source:
Link to this page:
Please notify us if you found a problem with this document: