Transcription of DRAM Design Overview - graphics.stanford.edu
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DRAM Design Overview - graphics.stanford.edu
Stanford CS Junji Ogawa MH students Feb. 11th. 1999. DRAM Design Overview DRAM Design Overview Stanford University Junji Ogawa Feb. 11th. 1998 Junji Ogawa DRAM Design Overview Contents Trends of Standard DRAM. History of DRAM Circuits Cell, Array and Major Circuits Embedded DRAM. ASM Example Summary Feb. 11th. 1998 Junji Ogawa Page 1. Stanford CS Junji Ogawa MH students Feb. 11th. 1999. DRAM Design Overview Standard DRAM Development 4G. 1000. 1G. 500 256M 4G. Conference Early Production 64M. Die Size(mm2). 200. 256M Production 100 64M. 16M 128M. 50 1G. i-line KrF KrF+ ArF ? Rule (um). 20. 90 92 94 96 98 00 02 04 06 08 10. Year Feb. 11th. 1998 Junji Ogawa DRAM Design Overview Bit Cost Trend of DRAMs 4 -0. 10 10. 3 -1. 10 10. size Die Density Mbits). ity Die Size mm2). Bit Cost $ . 2 -2. 10 ns 10. Rule m . De 1 -3. 10 10. Bit Cost 0 -4.
Page 5 Stanford CS Junji Ogawa MH students Feb. 11th. 1999 Feb. 11th. 1998 DRAM Design Overview Junji Ogawa 10-2 10-1 100 101 Power Supply Voltage (V) Active Power tRC=min. (A) Stand-by Power ( Low Power mode: mA)
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