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ECEN720: High-Speed Links Circuits and Systems Spring 2021

Sam PalermoAnalog & Mixed-Signal CenterTexas A&M UniversityECEN720: High-Speed Links Circuits and SystemsSpring 2021 Lecture 5: Termination, TX Driver, & Multiplexer CircuitsAnnouncements Lab 3 Report and Prelab 4 due Feb. 26 Reading Papers posted on voltage-mode drivers and high-order TX multiplexer circuits2 Agenda Termination Circuits TX Driver Circuits TX circuit speed limitations Clock distribution Multiplexing techniques3 High-Speed Electrical Link System4 Termination Off-chip vs on-chip Series vs parallel DC vs AC Coupling Termination circuits5 Off-Chip vs On-Chip Termination6 Package parasitics act as an unterminated stub which sends reflections back onto the line On-chip termination makes package inductance part of transmission line[Dally]

steps, sheet resistance, parasitic capacitance, linearity, and ESD tolerance • Integrated passive termination resistors are typically realized with ... Termination Digital Control Loop ... Y.-H. Song, R. Bai, P. Chiang, and S. Palermo, “A 0.47-0.66pJ/bit, 4.8-8Gb/s I/O Transceiver in 65nm-CMOS,” IEEE JSSC, vol. 48, no. 5, pp. 1276-1289 ...

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Transcription of ECEN720: High-Speed Links Circuits and Systems Spring 2021

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people.engr.tamu.edu

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ECEN720: High-Speed Links Circuits and Systems Spring 2021

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