Transcription of Floating Point Arithmetic Unit Using Verilog
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Floating Point Arithmetic Unit Using Verilog
Advance in Electronic and Electric Engineering. ISSN 2231-1297, Volume 3, Number 8 (2013), pp. 1013-1018 Research India Publications Floating Point Arithmetic Unit Using Verilog Lalita Gangwar1 and Rajan Chaudhary2 1,2 Department of Electronics and Communication, Future Institute of Engineering and Technology Bareilly, India. Abstract This research paper presents techniques for solving the Arithmetic problems related to number systems. In this work a Floating - Point Arithmetic unit, including following functions: addition, subtraction, multiplication, division, square root and conversion of integer to Floating - Point and conversion of Floating - Point to integer, is designed. Further it is shown how these functions can be implemented, and how these functions can be verified. Here in this research paper it is tried to redesign the Floating - Point unit. It includes all the software needed to generate custom Verilog coded Floating - Point Arithmetic unit.
own testbench and in addition used the testing methodology adopted by the open cores design and reran their tests. Finally synthesized the design using a real ASIC library and wire load model. Arithmetic functions on floating point numbers consist of addition, subtraction, multiplication and division. The functions are done with
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