Transcription of Hardware and Layout Design Considerations for DDR …
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Hardware and Layout Design Considerations for DDR …
Freescale SemiconductorApplication Note Freescale Semiconductor, Inc., 2003, 2007. All rights reserved. Embedded systems that use double data rate memory (DDR) can realize increased performance over traditional single data rate (SDR) memories. As the name implies, DDR enables two data transactions to occur within a single clock cycle without doubling the applied clock or without to doubling the size of the data bus. This increased data bus performance is due to source-synchronous data strobes that permit data to be captured on both the falling and rising edges of the DDR can bring improved performance to an embedded Design , care must be observed in the schematic and Layout phases to ensure that desired performance is realized.
6 Length Matching Overview The following sections discuss considerations for length matching. 6.1 Signal Length Matching Signal length matching is a two-fold item for the board designer. To ensu re a robust interface, the designer must address both components. First, adhere to the absolute routed maximums to prevent signal integrity issues.
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