Transcription of Instruction Set Nomenclature - Microchip Technology
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Instruction Set Nomenclature - Microchip Technology
AVR Microcontrollers AVR Instruction Set Manual OTHERI nstruction Set NomenclatureStatus Register (SREG)SREGS tatus RegisterCCarry FlagZZero FlagNNegative FlagVTwo s complement overflow indicatorSN V, for signed testsHHalf Carry FlagTTransfer bit used by BLD and BST instructionsIGlobal Interrupt Enable/Disable FlagRegisters and OperandsRd:Destination (and source) register in the Register FileRr:Source register in the Register FileR:Result after Instruction is executedK:Constant datak:Constant addressb:Bit in the Register File or I/O Register (3-bit)s:Bit in the Status Register (3-bit)X,Y,Z:Indirect Address Register (X=R27:R26, Y=R29:R28, andZ=R31:R30)A:I/O location addressq:Displacement for direct addressing (6-bit)Atmel-0856L-AVR- Instruction -Set-M anual_Other-11/2016 Table of ContentsInstruction Set , RAMPY, and Program and Data Addressing Direct, Single Register Direct - Two Registers, Rd and Indirect with Indirect with Indirect with Memory Constant Addressing using the LPM, ELPM, and SPM Memory with Post-increment using the LPM Z+ and ELPM Z+ Program Addressing, JMP and Program Addressing, IJMP and Program Addressing, RJMP and Branch Set Add with Register (SREG) and Boolean Add without Register (SREG) and Boolean Add Immediate to Register (SREG) and Boolean
Instruction Set Nomenclature Status Register (SREG) SREG Status Register C Carry Flag Z Zero Flag N Negative Flag V Two’s complement overflow indicator S N ⊕ V, for signed tests H Half Carry Flag T Transfer bit used by BLD and BST instructions I Global Interrupt Enable/Disable Flag Registers and Operands
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