Transcription of KCU105 Board User Guide - Xilinx
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KCU105 Board User Guide - Xilinx
KCU105 BoardUser GuideUG917 ( ) February 6, 2019 KCU105 Board User Guide2UG917 ( ) February 6, HistoryThe following table shows the revision history for this Electrostatic Discharge Caution. Added memory component information in DDR4 Component Memory. Replaced pin AM9 with D28 in Table 1-13. Revised appendix title and removed constraints file listing in Appendix D, Xilinx Design Constraints. Updated Markings in Appendix G, Regulatory and Compliance System Clock Source and Table Table 1-22 and Table 1-23. Added Documentation Navigator and Design Programmable User Clock Source, FMC HPC Connector J22, FMC LPC Connector J2, and Switches.
01/12/2017 1.7 Revised Programmable User Clock Source, FMC HPC Connector J22, FMC LPC Connector J2, and Switches. Revised Figure A-1. 03/31/2016 1.6 Updated Table 1-11. 03/24/2016 1.5 Updated Figure 1-21. Changed the IOSTANDARD LVCMOS18 line in KCU105 Board Constraints File Listing on pa ge 120. Added boar d thickness to Dimensions. Updated
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