LAN8720A/LAN8720Ai Datasheet

LAN8720A/LAN8720Ai . Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support Highlights Key Benefits Single-Chip Ethernet Physical Layer Transceiver High-Performance 10/100 Ethernet Transceiver (PHY) - Compliant with (Fast Comprehensive flexPWR Technology Ethernet). - Flexible Power Management Architecture - Compliant with ISO 802-3/IEEE - LVCMOS Variable I/O voltage range: + (10 BASE-T). to + - Loop-back modes - Integrated regulator - Auto-negotiation HP Auto-MDIX support - Automatic polarity detection and correction Miniature 24-pin QFN/SQFN lead-free RoHS - Link status change wake-up detection compliant packages (4 x 4mm). - Vendor specific register functions - Supports the reduced pin count RMII inter- Target Applications face Set-Top Boxes Power and I/Os Networked Printers and Servers - Various low power modes Test Instrumentation - Integrated power-on reset circuit LAN on Motherboard - Two status LED outputs Embedded Telecom Applications - Latch-Up Performance Exceeds 150mA per EIA/JESD 78, Class II.

The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur

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