Transcription of Layout Design Guide - Toradex
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Layout Design Guide Layout Design Guide Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 2 Issued by: Toradex Document Type: Design Guide Purpose: This document is a guideline for designing a carrier board with high speed signals that is used with Toradex Computer Modules. Document Version: Revision History Date Version Remarks 14 April 2015 Initial Release, based on section 2 of the Apalis Carrier board Design Guide Layout Design Guide Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l l Page | 3 1 Introduction.
SATA, HDMI, USB 3.0, Ethernet, and LVDS which require special layout considerations regarding trace impedance and length matching. Improper routing of such signals is a common pitfall in the design of an Apalis or Colibri carrier board. This document helps avoiding layout problems that can cause signal quality or EMC problems.
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