Transcription of MIPS32 Instruction Set Quick Reference
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MIPS32 Instruction Set LOGICAL AND BIT-FIELD OPERATIONS JUMPS AND BRANCHES (NOTE: ONE DELAY SLOT). Quick Reference AND RD, RS, RT RD = RS & RT B OFF18 PC += OFF18 .. ANDI RD, RS, CONST16 RD = RS & CONST16 BAL OFF18 RA = PC + 8, PC += OFF18 . RD DESTINATION REGISTER . EXT R2. RD, RS, P, S RS = R SP+S-1:P BEQ RS, RT, OFF18 IF RS = RT, PC += OFF18 . RS, RT SOURCE OPERAND REGISTERS. RA RETURN ADDRESS REGISTER (R31) INSR2 RD, RS, P, S RDP+S-1:P = RSS-1:0 BEQZ RS, OFF18 IF RS = 0, PC += OFF18 . PC PROGRAM COUNTER. ACC 64-BIT ACCUMULATOR NOP NO-OP BGEZ RS, OFF18 IF RS 0, PC += OFF18 . LO, HI ACCUMULATOR LOW (ACC31:0) AND HIGH (ACC 63:32) PARTS NOR RD, RS, RT RD = ~(RS | RT). SIGNED OPERAND OR SIGN EXTENSION BGEZAL RS, OFF18 RA = PC + 8; IF RS 0, PC += OFF18 . UNSIGNED OPERAND OR ZERO EXTENSION NOT RD, RS RD = ~RS. BGTZ RS, OFF18 IF RS > 0, PC += OFF18 . :: CONCATENATION OF BIT FIELDS OR RD, RS, RT RD = RS | RT.
mips32® instruction set quick reference rd destination register rs, rt source operand registers ra return address register (r31) pc program counter acc 64-bit accumulator lo, hi accumulator low (acc31:0) and high (acc63:32) parts ± signed operand or sign extension ∅ unsigned operand or zero extension:: concatenation of bit fields
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