Transcription of NXP Semiconductors Data Sheet: Technical Data ΣΔ S32R264K ...
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NXP Semiconductors Data Sheet: Technical Data ΣΔ S32R264K ...
S32R274S32R274/S32R264 SeriesData SheetSupports S32R274K, S32R274J, S32R264K and S32R264 JFeatures On-chip modules available within the device includethe following features: Safety core: Power Architecture e200Z4 32-bit CPUwith checker core Dual issue computation cores: Power Architecture e200Z7 32-bit CPU 2 MB on-chip code flash (FMC flash) with ECC MB on-chip SRAM with ECC RADAR processing Signal Processing Toolbox (SPT) for RADAR signalprocessing acceleration Cross Timing Engine (CTE) for precise timinggeneration and triggering Waveform generation module (WGM) for chirpramp generation 4x 12-bit -ADC with 10 MSps One DAC with 10 MSps MIPICSI2 interface to connect external ADCs Memory Protection Each core memory protection unit provides 24entries Data and instruction bus system memory protectionunit (SMPU) with 16 region descriptors each Register protection Clock Generation 40 MHz external crystal (XOSC) 16 MHz Internal oscillator (IRCOSC) Dual system PLL with one frequency modulatedphase-locked loop (FMPLL)
9.3 LVDS Fast Asynchronous Transmission (LFAST) electrical ... • Boot Assist Module (BAM) supports internal flash programming via a serial link (LIN / CAN) • Timers • Two Periodic Interval Timers (PIT) with 32-bit counter resolution Introduction S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021 NXP Semiconductors 7 • Three System Timer ...
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