Transcription of RF Agile Transceiver Data Sheet AD9364 - Analog Devices
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RF Agile Transceiver Data Sheet AD9364 - Analog Devices
RF Agile TransceiverData Sheet AD9364 Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices . Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, : 2013 2014 Analog Devices , Inc. All rights reserved. Technical Support FEATURES RF 1 1 Transceiver with integrated 12-bit DACs and ADCs Band: 70 MHz to GHz Supports time division duplex (TDD) and frequency division duplex (FDD) operation Tunable channel bandwidth (BW): <200 kHz to 56 MHz 3-band receiver: 3 differential or 6 single-ended inputs Superior receiver sensitivity with a noise figure of < dB Rx gain control Real-time monitor and control signals for manual gain Independent automatic gain control 2-band differential output transmitter Highly linear broadband transmit
The fully integrated phase-locked loops (PLLs) provide low power fractional-N frequency synthesis for all Rx and Tx channels. All VCO and loop filter components are integrated. The core of the AD9364 can be powered directly from a 1.3 V regulator. The IC is controlled via a standard 4-wire serial port and four real-time input control pins.
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