Transcription of Semiconductor Corporation Digital Audio Interface …
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CS8411 CS8412. Semiconductor Corporation Digital Audio Interface Receiver Features General Description: Monolithic CMOS Receiver The CS8411/12 are monolithic CMOS devices which re- ceive and decode Audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 Interface Low-Jitter, On-Chip Clock Recovery standards. The CS8411/12 receive data from a trans- mission line, recover the clock and synchronization 256 Fs Output Clock Provided signals, and de-multiplex the Audio and Digital data. Dif- Supports: ferential or single ended inputs can be decoded. AES/EBU, IEC 958, The CS8411 has a configurable internal buffer memory, S/PDIF, & EIAJ CP-340 read via a parallel port, which may be used to buffer Professional and Consumer Formats channel status, auxiliary data, and/or user data.
Specifications are subject to change without notice. ABSOLUTE MAXIMUM RATINGS (GND = 0V, all voltages with respect to ground) Parameter Symbol Min Max Units Power Supply Voltage VD+, VA+ 6.0 V
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Phase Locked Loops, PHASE LOCKED LOOP, Phase-locked loop, Phase-Locked Loops, Phase, Phase Locked, Microcontrollers for Three Phase Grid Connected Applications, PATELLAR TENDON REPAIR, To 1000 MHz Quadrature, To 1000 MHz Quadrature Modulator, Analog Devices, ACL RECONSTRUCTION WITH MENISCUS, Processing Gain for Direct Sequence