Transcription of Software Developer Guide - Xilinx
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Software Developer Guide - Xilinx
Zynq UltraScale+ MPSoCSoftware Developer GuideUG1137 ( ) July 1, 2020 Revision HistoryThe following table shows the revision history for this Summary07/01/2020 Version 10: Platform Management Unit FirmwareUpdated PMU Firmware Build Flags to add a new 12: ResetUpdated RPU Subsystem Restart for RPU only restartsupport E: XilSecure Library Additional H: XilFPGA Library Additional Version Embedded FlowUpdated SDK flows to Vitis Embedded Flow throughout Version 4: Software StackUpdated Multimedia Stack 7: System Boot and ConfigurationUpdated Miscellaneous FunctionsChapter 10: Platform Management Unit FirmwareAdded CSU/PMU Register Access and updated PMUF irmware Build FlagsChapter 11: Power Management FrameworkUpdated Sub-system Power ManagementAdded appendix01/18/2019 Version 2: Programming View of Zynq UltraScale+ MPSoCDevicesUpdated Boot Modes and System-Level Protections sectionsChapter 3: Development ToolsAdded
Chapter 4: Software Stack Added FreeRTOS Software Stack Chapter 5: Software Development Flow Removed Developing Open Source Software. Chapter 6: Software Design Paradigms Added Frameworks for Multiprocessor Development Chapter 7: System Boot and Configuration Modified SD Mode diagram, Figure 7-2. Modified NAND Mode diagram Figure 7-4.
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