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Solutions1 Note: Version completed 12/23/04. Includes solutions to nearly all problems. Thanks to Ted Jiang for generating many of the SPICE simulations. Chapter Starting with 42,000,000 transistors in 2000 and doubling every 26 months for 10 years gives 42M21012 26---------------- 1B ABCDYAY(a)ABY(b)ABY(c)(d) The minimum area is 5 tracks by 5 tracks (40 x 40 = 1600 2). This latch is nearly identical save that the inverter and transmission gate feedback A0A0A1A1Y0Y1Y2Y3(a)Y1Y0A0A1A1A0A2(b)n+n+ p substratep+p+n wellAYVDDn+GNDBCHAPTER 2 SOLUTIONS3has been replaced by a tristate feedaback (c) 5 x 6 tracks = 40 x 48 = 1920 2.

CHAPTER 2 SOLUTIONS 5 (b) (c) vT = kT/q = 34 mV; ; note, however, that the total leakage will normally be higher for both threshold voltages at high temperature. 2.11 The nMOS will be off and will see Vds = VDD, so its leakage is 2.13 Assume VDD = 1.8 V. For a single transistor with n = 1.4, For two transistors in series, the intermediate voltage x and leakage current are

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