Transcription of Stand-alone CAN controller - NXP
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Stand-alone CAN controller - NXP
DATA SHEETP roduct specificationSupersedes data of 1999 Aug 17 File under Integrated Circuits, IC182000 Jan 04 INTEGRATED CIRCUITSSJA1000 Stand-alone CAN controller2000 Jan 042 Philips SemiconductorsProduct specificationStand-alone CAN controllerSJA1000 CONTENTS1 FEATURES2 GENERAL DESCRIPTION3 ORDERING INFORMATION4 BLOCK DIAGRAM5 PINNING6 FUNCTIONAL of the CAN controller Management Logic (IML) Buffer (TXB) Buffer (RXB, RXFIFO) Filter (ACF) Stream Processor (BSP) Timing Logic (BTL) Management Logic (EML) description of the CAN between BasicCAN and address Register (CR) Register (CMR) Register (SR) Register (IR) buffer address Register (MOD) Register (CMR) Register (SR) Register (IR) Enable Register (IER) Lost Capture register (ALC) Code Capture register (ECC) Warning Limit Register (EWLR) Error Counter Register (RXERR) Error Counter
2000 Jan 04 5 Philips Semiconductors Product specification Stand-alone CAN controller SJA1000 5 PINNING Note 1. XTAL1 and XTAL2 pins should be connected to VSS1 via 15 pF capacitors. SYMBOL PIN DESCRIPTION
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