Transcription of UltraScale Architecture DSP Slice User Guide
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UltraScale Architecture DSP Slice User Guide
UltraScale Architecture DSP Slice User Guide UG579 ( ) September 20, 2019. Revision History The following table shows the revision history for this document. Date Version Revision 09/20/2019 Added VU19P, VU45P, and VU47P to Table 1-2. 05/14/2019 In Device Resources, updated Tcl command and added note. In Table 1-2, updated total column for VU11P and VU13P, and added VU27P, VU29P, VU31P, VU33P, VU35P, and VU37P devices. 06/04/2018 Added description of ALUMODE after Figure 5-3, and added Table 5-1. Updated ALUMODE settings in Adder/Subtracter-only Operation.
while efficiently routing and processing data on -chip. UltraScale arch itecture-based devices address a vast spectrum of high-bandwidth, hi gh-utilization system requirements by using industry-leading technical innovations, including next-generation routing, ASIC-like clocking, 3D-on-3D ICs, multiprocessor SoC (MPSoC) technologies, and new power
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