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Understanding High Speed ADC Testing and …
AN-835. APPLICATION NOTE. One Technology Way Box 9106 Norwood, MA 02062-9106, Tel: Fax: Understanding high Speed ADC Testing and Evaluation by Alex Arrants, Brad Brannon and Rob Reeder SCOPE DYNAMIC TEST HARDWARE SETUP. This document describes both the characterization and production SNR, SINAD, worst spur, and IMD are tested using a hardware test methods used by the high Speed Converter Group of Analog setup similar to that shown in Figure 1. In production tests, the Devices, Inc., to evaluate high Speed analog-to-digital converters test hardware is highly integrated, but the hardware principles (ADCs). While this application note should be considered a are the same. The basic setup for dynamic Testing includes a reference, it is not a substitute for a product data sheet. signal generator, band-pass filter, test fixture, low noise power supplies, encode source (often integrated on the evaluation board), data acquisition module, and data analysis software.
AN-835 Application Note Rev. B | Page 4 of 28 HSC-ADC-EVALC EVALUATION PLATFORM The high speed ADC FIFO evaluation kit (HSC_ADC_EVALC) includes a FPGA-based buffer memory board to capture blocks
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