Transcription of Understanding High Speed ADC Testing and Evaluation
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Understanding High Speed ADC Testing and Evaluation
AN-835 APPLICATION NOTEOne Technology Way P. O . Box 9106 Norwood, MA 02062-9106, Te l : Fax: Understanding High Speed ADC Testing and Evaluation by Alex Arrants, Brad Brannon and Rob Reeder Rev. B | Page 1 of 28 SCOPE This document describes both the characterization and production test methods used by the High Speed Converter Group of Analog Devices, Inc., to evaluate high Speed analog-to-digital converters (ADCs). While this application note should be considered a reference, it is not a substitute for a product data sheet. DYNAMIC TEST HARDWARE SETUP SNR, SINAD, worst spur, and IMD are tested using a hardware setup similar to that shown in Figure 1.
test hardware is highly integrated, but the hardware principles are the same. The basic setup for dynamic testing includes a signal generator, band-pass filter, test fixture, low noise power supplies, encode source (often integrated on the evaluation board), data acquisition module, and data analysis software.
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