Transcription of x86 Instruction Set Architecture - MindShare
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X86 Instruction Set ArchitectureComprehensive 32/64-bit CoverageFirst EditionAlso by Tom ShanleyHEAVEN S FAVORITE A Novel of Genghis Khan Book 1, ASCENT: THE RISE OF CHINGGIS KHANBook 2, DOMINION: DAWN OF THE MONGOL EMPIREMINDSHARE TECHNICAL TRAININGP lease visit for a complete description of Mind-Share s technical offerings: Books eBooks eLearning modules Public courses On-site course On-line coursesIntel Core 2 Processor (Penryn)Intel Nehalem ProcessorIntel Atom ProcessorAMD Opteron Processor (Barcelona)Intel 32/64-bit x86 Software ArchitectureAMD 32/64-bit x86 Software Architecturex86 Assembly Language ProgrammingProtected Mode ProgrammingPC VirtualizationIO Virtualization (IOV)Computer Architectures with Intel ChipsetsIntel QuickPath Interconnect (QPI)
At-a-Glance Table of Contents Part 1: Introduction, intended as a back-drop to the detailed discussions that follow, consists of the following chapters: † Chapter 1, "Basic Terms and Concepts," on page 11.
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