Transcription of Zynq®-7000 AP SoC Family - Xilinx
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Zynq®-7000 AP SoC Family - Xilinx
Page 2 zynq - 7000 AP SoCFamilyCost-Optimized DevicesMid-Range DevicesDevice NameZ-7007SZ-7012SZ-7014SZ-7010Z-7015Z-7 020Z-7030 Z-7035Z-7045Z-7100 Part NumberXC7Z007 SXC7Z012 SXC7Z014 SXC7Z010XC7Z015XC7Z020XC7Z030XC7Z035XC7Z 045XC7Z100 Processing System (PS)Processor CoreSingle-CoreARM Cortex -A9 MPCore Up to766 MHzDual-Core ARMC ortex-A9 MPCoreUp to866 MHzDual-Core ARMC ortex-A9 MPCoreUp to 1 GHz(1)Processor ExtensionsNEON SIMDE ngine and Single/Double Precision Floating Point Unit perprocessorL1 Cache32KB Instruction, 32KB Data per processorL2 Cache512 KBOn-Chip Memory256 KBExternal Memory Support(2)DDR3, DDR3L, DDR2, LPDDR2 External Static Memory Support(2)2x Quad-SPI, NAND, NORDMA Channels8 (4 dedicated to PL)Peripherals2x UART, 2x CAN , 2x I2C, 2x SPI, 4x 32b GPI
Page 4 Artix-7 FPGAs Notes: 1. Supports PCI Express Base 2.1 specification at Gen1 and Gen2 data rates. 2. Represents the maximum number of transceivers available.
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