Adp5052 rev d

Arty™ FPGA Board Reference Manual - Digilent Reference

port (J10) or it can be derived from a 7 to 15 Volt D power supply that [s connected to Power Jack (J12) or Pin 8 of Header J7. Header J13, located between the power jack and the Ethernet connector, is used to determine which source is used. A power-good LED (LD11), driven by the power good _ (PWRGD) output of the ADP5052 regulator, indicates that

  Tray, Adp5052