AND 5800 AND 5801 - Elektronik

1 5800 and 5801 BiMOS IILATCHED DRIVERSUCN5800 ABiMOS II LATCHED DRIVERSUCN5800 LAlways order by complete part number, , UCN5800A/L and UCN5801A/EP/LW latched-input BiMOSICs merge high-current, high-voltage outputs with CMOS logic. TheCMOS input section consists of 4 or 8 data ( D type) latches withassociated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar npn Darlingtons. This mergedtechnology provides versatile, flexible interface. These BiMOS powerinterface ICs greatly benefit the simplification of computer or micropro-cessor I/O. The UCN5800A and UCN5800L each contain four latcheddrivers; the UCN5801A, UCN5801EP, and UCN5801LW contain eightlatched UCN5800A/L and UCN5801A/EP/LW supersede the originalBiMOS latched-input driver ICs (UCN4400A and UCN4801A). Thesesecond-generation devices are capable of much higher data inputrates and will typically operate at better than 5 MHz with a 5 V logicsupply.

2 Circuit operation at 12 V affords substantial improvement overthe 5 MHz CMOS inputs are compatible with standard CMOS and NMOS circuits. TTL circuits may mandate the addition of input pull-up resis-tors. The bipolar Darlington outputs are suitable for directly drivingmany peripheral/power loads: relays, lamps, solenoids, small dcmotors, devices have open-collector outputs and integral diodes forinductive load transient suppression. The output transistors arecapable of sinking 500 mA and will withstand at least 50 V in the OFFstate. Because of limitations on package power dissipation, the simul-taneous operation of all drivers at maximum rated current can only beaccomplished by a reduction in duty cycle. Outputs may be paralleledfor higher load current UCN5800A is furnished in a standard 14-pin DIP; theUCN5800L and UCN5801LW in surface-mountable SOICs; theUCN5801A in a 22-pin DIP with " ( mm) row centers; theUCN5801EP in a 28-lead MHz Data Input RatenHigh-Voltage,High-Current OutputsnCMOS, NMOS,TTL Compatible Inputsn Output Transient Protectionn Internal Pull-Down Resistorsn Low-Power CMOS LatchesnAutomotive Capable234567891011121314 SUPPLYGROUNDCLEAROUT1 OUT2 OUT3 Dwg.

3 PP-014 AOUT41141 COMMONOUTPUTENABLEIN1 STROBEIN2IN3IN4 VDDLATCHESData MAXIMUM RATINGSat +25 C Free-Air TemperatureOutput Voltage, VCE.. 50 VSupply Voltage, VDD.. 15 VInput Voltage Range,VIN.. V to VDD + VContinuous Collector Current,lC.. 500 mAPackage Power Dissipation,PD.. See GraphOperating Temperature Range,TA.. -20 C to +85 CStorage Temperature Range,TS.. -55 C to +150 CCaution: CMOS devices have input staticprotection but are susceptible to damage whenexposed to extremely high static the UCN5800A (DIP) and the UCN5800L(SOIC) are electrically identical and share acommon terminal number AND58015800 AND 5801 BiMOS IILATCHED DRIVERS115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 FUNCTIONAL BLOCK DIAGRAMC opyright 1985, 1997, Allegro MicroSystems, PACKAGE POWER DISSIPATION IN WATTSAMBIENT TEMPERATURE IN GP-023-122-PIN DIP, R = 50 C/W JA28-LEAD PLCC, R = 55 C/W JA14-PIN DIP, R = 60 C/W JA14-LEAD SOIC, R = 95 C/W JA24-LEAD SOIC, R = 68 C/W JACOMMONGROUNDSTROBEOUTPUT ENABLEINNCOMMON MOS CONTROLTYPICAL MOS LATCHTYPICAL BIPOLAR DRIVEOUTNDwg.

4 FP-016-1 CLEARSUPPLYVDDTYPICAL INPUT CIRCUITDwg. EP-010-4 AINVDD5800 AND 5801 BiMOS IILATCHED DRIVERSELECTRICAL CHARACTERISTICS at TA = +25 C, VDD = 5 V (unless otherwise noted). LimitsCharacteristicSymbol Test Leakage CurrentICEXVCE = 50 V, TA = +25 C 50 AVCE = 50 V, TA = +70 C 100 ACollector-EmitterVCE(SAT)IC = 100 mA = 200 mA = 350 mA, VDD = V VoltageVIN(0) (1)VDD = 12 VVDD = 10 VVDD = V (See Note) VInput ResistancerINVDD = 12 V50200 k VDD = 10 V50300 k VDD = V50600 k Supply CurrentIDD(ON)VDD = 12 V, Outputs Open = 10 V, Outputs Open = V, Outputs Open (OFF)VDD = 12 V, Outputs Open, Inputs = 0 V 200 AVDD = V, Outputs Open, Inputs = 0 V 50100 AClamp DiodeIRVR = 50 V, TA = +25 C 50 AVR = 50 V, TA = +70 C 100 AClamp Diode Forward VoltageVFIF = 350 mA : Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to ensure a minimum logic 1.

5 Saturation VoltageLeakage Current(Each Stage)(Total)123456789101112131415161718 19202122232425262728 GROUNDOUTPUTENABLESTROBEKSTVDDOEDwg. PP-037 LATCHESNCNCNCNCNCNCSUPPLYCLAMP DIODECOMMONCCLEAROUT1IN8 OUT8 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 IN1IN2 IN3 IN4 IN5 IN6 IN7 UCN5801EP(additional pinout diagramsare on next page) 5800 and 5801 BiMOS IILATCHED DRIVERS115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 TRUTH TABLE OUTNINNSTROBECLEARENABLEt-1t0100 XOFF1100 XONXX1 XXOFFXXX1 XOFFX000 ONONX000 OFFOFFX = = previous output = present output CONDITIONS(Logic Levels are VDD and Ground) Data Active Time Before Strobe Enabled(Data Set-Up Time) ..50 Data Active Time After Strobe Disabled(Data Hold Time) ..50 Strobe Pulse Width ..125 Time Between Strobe Activation andOutput On to Off Transition ..500 Time Between Strobe Activation andOutput Off to On Transition.

6 500 Clear Pulse Width ..300 Data Pulse Width ..225 nsInformation present at an input is transferred to its latch when theSTROBE is high. A high CLEAR input will set all latches to the outputOFF condition regardless of the data or STROBE input levels. A highOUTPUT ENABLE will set all outputs to the OFF condition, regardlessof any other input conditions. When the OUTPUT ENABLE is low, theoutputs depend on the state of their respective No. A-10,895 AUCN5801A22122 SUPPLYCLEAR1 OUTPUTENABLESTROBEVDD345671617181920 OUT1 OUT2 OUT3 OUT4IN1IN2IN3IN4789101112131415 GROUNDOUT5 OUT6 OUT7 Dwg. PP-015 OUT8 COMMONIN5IN6IN7IN8 LATCHES22324 SUPPLYCLEAR1 OUTPUTENABLESTROBEVDD345672122 OUT1 OUT2 OUT3 OUT4IN1IN2IN3IN47891011 GROUNDOUT5 OUT6 OUT7 Dwg. PP-015-1 OUT8 COMMONIN5IN6IN7IN8 LATCHESNOCONNECTIONNOCONNECTIONNCNC12131 8192014151617 UCN5801LW5800 AND 5801 BiMOS IILATCHED DRIVERSTYPICAL APPLICATIONUNIPOLAR STEPPER-MOTOR DRIVEDwg.

7 No. B-15371234567891011121314 OUT 2 OUT 3 OUT 4 OUT 1+30 VIN 1IN 2IN 3IN 4 STROBECLEAROUTPUT ENABLE (ACTIVE LOW)LATCHESUCN-5800 AVDDVDD+30 V STROBEIN 1IN 2IN 3IN 4 OUT 1 OUT 2 OUT 3 OUT 4 Dwg. GP-060 STROBEIN 1IN 2IN 3IN 4 OUT 1 OUT 2 OUT 3 OUT 4 Dwg. GP-060-1 UNIPOLAR WAVE DRIVEUNIPOLAR 2-PHASE DRIVE5800 AND 5801 BiMOS IILATCHED DRIVERS115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 UCN5800 ADimensions in Inches(controlling dimensions)Dimensions in Millimeters(for reference only)NOTES: 1. Exact body and lead configuration at vendor s option within limits Lead spacing tolerance is Lead thickness is measured at seating plane or MA-001-14A MA-001-14A AND 5801 BiMOS IILATCHED DRIVERSNOTES: body and lead configuration at vendor s option within limits spacing tolerance is TO 8 MA-007-14 TO 8 Dwg. MA-007-14A in Inches(for reference only)Dimensions in Millimeters(controlling dimensions) 5800 and 5801 BiMOS IILATCHED DRIVERS115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 UCN5801 ADimensions in Inches(controlling dimensions)Dimensions in Millimeters(for reference only)NOTES: 1.

8 Exact body and lead configuration at vendor s option within limits Lead spacing tolerance is Lead thickness is measured at seating plane or MA-002-22 mm MA-002-22 in AND 5801 BiMOS IILATCHED DRIVERSUCN5801 EPDimensions in Inches(controlling dimensions)Dimensions in Millimeters(for reference only)NOTES: 1. Exact body and lead configuration at vendor s option within limits Lead spacing tolerance is AREADwg. MA-005-28A AREADwg. MA-005-28A AND 5801 BiMOS IILATCHED DRIVERS115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 UCN5801 LWDimensions in Inches(for reference only)Dimensions in Millimeters(controlling dimensions)NOTES: body and lead configuration at vendor s option within limits spacing tolerance is TO 8 MA-008-24A TO 8 MA-008-24A AND 5801 BiMOS IILATCHED DRIVERSThis page intentionally left blank5800 AND 5801 BiMOS IILATCHED DRIVERS115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 BiMOS II (Series 5800) & DABiC IV (Series 6800)INTELLIGENT POWER INTERFACE DRIVERSSELECTION GUIDEF unctionOutput Ratings *Part Number SERIAL-INPUT LATCHED DRIVERS8-Bit (saturated drivers)-120 mA 50 V 58958-Bit350 mA 50 V58218-Bit350 mA80 V58228-Bit350 mA 50 V 58418-Bit350 mA 80 V A 50 V582910-Bit (active pull-downs)-25 mA 60 V5810-F and 6809/1012-Bit (active pull-downs)-25 mA 60 V5811 and 681120-Bit (active pull-downs)-25 mA 60 V5812-F and 681232-Bit (active pull-downs)-25 mA 60 V5818-F and 681832-Bit100 mA 30 V583332-Bit (saturated drivers)

9 100 mA 40 V5832 PARALLEL-INPUT LATCHED DRIVERS4-Bit350 mA 50 V 58008-Bit-25 mA 60 V58158-Bit350 mA 50 V 5801 SPECIAL-PURPOSE FUNCTIONSU nipolar Stepper Motor A 50 V 5804 Addressable 28-Line Decoder/Driver450 mA 30 V6817* Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage current is defined as coming out of (sourcing) the output. Complete part number includes additional characters to indicate operating temperature range and package style. Internal transient-suppression diodes included for inductive-load MicroSystems, Inc. reserves the right to make, from time to time, such departures fromthe detail specifications as may be required to permit improvements in the design of its information included herein is believed to be accurate and reliable. However, AllegroMicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents orother rights of third parties which may result from its use.