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1.8-V Micropower CMOS Operational Amplifier …

Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design OPA2333-HT. SBOS483I JULY 2009 REVISED MAY 2015. OPA2333-HT Micropower cmos Operational Amplifier Zero-Drift Series 1 Features 3 Description . 1 Low Offset Voltage: 26 V (Maximum) The OPA2333 series of cmos Operational amplifiers uses a proprietary auto-calibration technique to to 10-Hz Noise: VPP simultaneously provide very low offset voltage and Quiescent Current: 50 A near-zero drift over time and temperature(1). These Single-Supply Operation miniature, high-precision, low-quiescent-current Supply Voltage: V to V amplifiers offer high-impedance inputs that have a common-mode range 100 mV beyond the rails, and Rail-to-Rail Input and Output rail-to-rail output that swings within 150 mV of the Supports Extreme Temperature Applications rails.

V+ ILOAD A1 A2 Q1 Q2 + + + ± VIN S1R LOAD R S2 R S3 IRS1 IRS2 RS3 VRS2 V RS3 VRS1 LOAD V+ C 6 C 7 R 3 R 5 R 4 R 2 470 4.7 2200 pF 330 10 k …

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Transcription of 1.8-V Micropower CMOS Operational Amplifier …

1 Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design OPA2333-HT. SBOS483I JULY 2009 REVISED MAY 2015. OPA2333-HT Micropower cmos Operational Amplifier Zero-Drift Series 1 Features 3 Description . 1 Low Offset Voltage: 26 V (Maximum) The OPA2333 series of cmos Operational amplifiers uses a proprietary auto-calibration technique to to 10-Hz Noise: VPP simultaneously provide very low offset voltage and Quiescent Current: 50 A near-zero drift over time and temperature(1). These Single-Supply Operation miniature, high-precision, low-quiescent-current Supply Voltage: V to V amplifiers offer high-impedance inputs that have a common-mode range 100 mV beyond the rails, and Rail-to-Rail Input and Output rail-to-rail output that swings within 150 mV of the Supports Extreme Temperature Applications rails.

2 Single or dual supplies as low as V ( V). Controlled Baseline and up to V ( V) may be used. They are optimized for low-voltage single-supply operation. One Assembly/Test Site One Fabrication Site The OPA2333 offers excellent common-mode rejection ratio (CMRR) without the crossover Available in Extreme ( 55 C to 210 C) associated with traditional complementary input Temperature Range stages. This design results in superior performance Extended Product Life Cycle for driving analog-to-digital converters (ADCs) without Extended Product-Change Notification degradation of differential linearity. Product Traceability Device Information(2). Texas Instruments' high temperature products use PART NUMBER PACKAGE BODY SIZE (NOM).

3 Highly optimized silicon (die) solutions with design SOIC (8) mm mm and process enhancements to maximize CFP (8) mm mm performance over extended temperatures. OPA2333-HT. CFP (8) mm mm NOTE: Custom temperature ranges available CDIP SB (8) mm mm 2 Applications (1) See Electrical Characteristics for performance degradation over temperature. Down-Hole Drilling (2) For all available packages, see the orderable addendum at High Temperature Environments the end of the data sheet. Typical Application V+. RS2 IRS2 RS3 IRS3. 470 VRS2 10 k R4 VRS3. C7. 2200 pF. R5. A2. + Q2. V+ 330. + 200 Q1. A1. R3. +. VIN. 1000 pF. C6. 10 k VRS1 VLOAD. R2. RS1 IRS1 RLOAD ILOAD. 2k Copyright 2016, Texas Instruments Incorporated 1. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers.

4 PRODUCTION DATA. OPA2333-HT. SBOS483I JULY 2009 REVISED MAY 2015 Table of Contents 1 Features .. 1 Device Functional 14. 2 Applications .. 1 8 Application and Implementation .. 15. 3 Description .. 1 Application 15. 4 Revision 2 Typical Applications .. 15. System Examples .. 20. 5 Pin Configuration and Functions .. 3. 6 5 9 Power Supply 22. Absolute Maximum Ratings .. 5 10 23. ESD 5 Layout Guidelines .. 23. Recommended Operating 5 Layout Example .. 23. Thermal Information .. 5 11 Device and Documentation Support .. 24. Electrical 6 Device 24. Typical Characteristics .. 9 Community 24. 7 Detailed Description .. 12 Trademarks .. 24. Overview .. 12 Electrostatic Discharge Caution .. 24. Functional Block Diagrams.

5 12 Glossary .. 24. Feature 12 12 Mechanical, Packaging, and Orderable Information .. 24. 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision H (November 2013) to Revision I Page Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .. 1. Removed Ordering Information table .. 1. Moved temperature range from Electrical Characteristics table to the Absolute Maximum Ratings and Recommended Operating Conditions tables.

6 5. Changes from Revision G (September 2012) to Revision H Page Changed Operating Life Derating Chart .. 8. 2 Submit Documentation Feedback Copyright 2009 2015, Texas Instruments Incorporated Product Folder Links: OPA2333-HT. OPA2333-HT. SBOS483I JULY 2009 REVISED MAY 2015. 5 Pin Configuration and Functions D, JD, or HKJ Package 8-Pin SOIC, CDIP SB, or CFP HKQ Package Top View 8-Pin CFP. Top View OUT A 1 8 V+. 8 1. -IN A 2 7 OUT B V+ OUT A. +IN A 3 6 -IN B OUT B -IN A. V- 4 5 +IN B -IN B +IN A. +IN B V- 5 4. HKQ as formed or HKL mounted dead bug Pin Functions PIN. I/O DESCRIPTION. NO. NAME. 1 OUT A O Analog output channel A. 2 IN A I Inverting analog input channel A. 3 +IN A I Noninverting analog input channel A.

7 5 +IN B I Noninverting analog input channel B. 6 IN B I Inverting analog input channel B. 4 V Negative (lowest) power supply 7 OUT B O Analog output channel B. 8 V+ Positive (highest) power supply Copyright 2009 2015, Texas Instruments Incorporated Submit Documentation Feedback 3. Product Folder Links: OPA2333-HT. OPA2333-HT. SBOS483I JULY 2009 REVISED MAY 2015 | 962 mm |. |. OUT A V+. -IN A. OUT B. 38 mm |. 1490 mm -IN B. +IN A. V- +IN B. |. |. 38 mm Table 1. Bare Die Information BACKSIDE BOND PAD. DIE THICKNESS BACKSIDE FINISH. POTENTIAL METALLIZATION COMPOSITION. 15 mils. Silicon with backgrind V- Al-Si-Cu ( ). Table 2. Bond Pad Coordinates DESCRIPTION PAD NUMBER A B C D. OUT A 1 IN A 2 +IN A 3 V 4 +IN B 5 IN B 6 OUT B 7 V+ 8 4 Submit Documentation Feedback Copyright 2009 2015, Texas Instruments Incorporated Product Folder Links: OPA2333-HT.

8 OPA2333-HT. SBOS483I JULY 2009 REVISED MAY 2015. 6 Specifications Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1). MIN MAX UNIT. Supply voltage 7 V. (2). Signal input terminals, voltage (V+) + V. Output short circuit (3) Continuous JD, HKJ, HKQ packages 55 210. Operating temperature C. D package 55 175. JD, HKJ, HKQ packages 210. Junction temperature C. D package 175. Storage temperature, Tstg 65 210 C. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions.

9 Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input terminals are diode clamped to the power-supply rails. Input signals that can swing more than V beyond the supply rails should be current limited to 10 mA or less. (3) Short circuit to ground, one Amplifier per package. ESD Ratings VALUE UNIT. Electrostatic Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 4000. V(ESD) V. discharge Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) 1000. (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

10 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted). MIN NOM MAX UNIT. Supply voltage, VS = (V+) (V ) ( ) 5 ( ) ( ) V. JD, HKJ, HKQ packages 55 210. Operating temperature C. D package 55 175. Thermal Information OPA2333-HT. JD HKJ HKQ D. THERMAL METRIC (1) UNIT. (CDIP SB) (CFP) (CFP) (SOIC). 8 PINS 8 PINS 8 PINS 8 PINS. Junction-to-ambient thermal High-K board (3), no airflow R JA C/W. resistance (2) No airflow . Junction-to-case (top) thermal R JC(top) to ceramic side of case C/W. resistance to top of case lid (metal side of case) . Junction-to-board thermal R JB High-K board without underfill C/W. resistance JT Junction-to-top characterization parameter C/W. JB Junction-to-board characterization parameter C/W.


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