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120-volt, 100-watt, DMOS audio amplifier with mute …

September 2010 Doc ID 6744 Rev 81/2121 TDA7293120-volt, 100-watt, DMOS audio amplifierwith mute and standbyFeatures Multipower BCD technology Very high operating voltage range ( 50 V) DMOS power stage High output power (100 W into 8 @ THD =10%, with VS = 40 V) Muting and stand-by functions No switch on/off noise Very low distortion Very low noise Short-circuit protected (with no input signal applied) Thermal shutdown Clip detector Modularity (several devices can easily be connected in parallel to drive very low impedances)DescriptionThe TDA7293 is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications, such as home stereo, self powered loudspeakers and Topclass TV.

September 2010 Doc ID 6744 Rev 8 1/21 21 TDA7293 120-volt, 100-watt, DMOS audio amplifier with mute and standby Features Multipower BCD technology Very high operating voltage range (±50 V)

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Transcription of 120-volt, 100-watt, DMOS audio amplifier with mute …

1 September 2010 Doc ID 6744 Rev 81/2121 TDA7293120-volt, 100-watt, DMOS audio amplifierwith mute and standbyFeatures Multipower BCD technology Very high operating voltage range ( 50 V) DMOS power stage High output power (100 W into 8 @ THD =10%, with VS = 40 V) Muting and stand-by functions No switch on/off noise Very low distortion Very low noise Short-circuit protected (with no input signal applied) Thermal shutdown Clip detector Modularity (several devices can easily be connected in parallel to drive very low impedances)DescriptionThe TDA7293 is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications, such as home stereo, self powered loudspeakers and Topclass TV.

2 Thanks to the wide voltage range and to the high output current capability it is able to supply the highest power into both 4- and 8- built-in muting function with turn-on delay simplifies the remote operation avoiding on-off switching mode is possible by connecting several devices and using pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system Figure block diagram Table summaryOrder codePackageTDA7293 VMultiwatt15 VTDA7293 HSMultiwatt15 HMultiwatt15 VMultiwatt15 HIN-2R2680 C222 FC1 470nFIN+R1 22K3R3 22K-+MUTESTBY4 VMUTEVSTBY109 SGNDMUTESTBYR4 22 KTHERMALSHUTDOWNS/CPROTECTIONR5 10KC3 10 FC4 10 F1 STBY-GNDC522 F713146158-Vs-PWVsBOOTSTRAPOUT+PWVs+VsC9 100nFC8 1000 F-VsD97AU805A+VsC7 100nFC6 1000 FBUFFER DRIVER11 BOOTLOADER125 VCLIPCLIP DET(*)(*)

3 See Application note(**) for SLAVE function(**) ID 6744 Rev 8 Contents1 Pin connections .. 32 Electrical specifications .. maximum ratings .. data .. characteristics .. 53 Circuit description .. Stage .. Features .. 84 Applications information .. suggestions .. efficiency .. application .. application (ref. figure 12) .. capacitor .. 125 Package mechanical data .. package .. package .. 186 Revision history .. 20 TDA7293 Pin connectionsDoc ID 6744 Rev 83/211 Pin connectionsFigure connections 1234567910118 BUFFER DRIVERMUTESTAND-BY-VS (SIGNAL)+VS (SIGNAL)BOOTSTRAPCLIP AND SHORT CIRCUIT DETECTORSIGNAL GROUNDNON INVERTING INPUTINVERTING INPUTSTAND-BY GNDTAB CONNECTED TO PIN 813141512-VS (POWER)OUT+VS (POWER)

4 BOOTSTRAP LOADERD97AU806 Electrical specificationsTDA72934/21 Doc ID 6744 Rev 82 Electrical Absolute maximum ratings Thermal data Table maximum ratingsSymbolParameterValueUnitVSSupply voltage (no signal) 60VV1 VSTANDBY GND voltage referred to -VS (pin 8)90VV2 Input voltage (inverting) referred to -VS90VV2 - V3 Maximum differential inputs 30VV3 Input voltage (non inverting) referred to -VS90VV4 Signal GND voltage referred to -VS90VV5 Clip detector voltage referred to -VS120VV6 Bootstrap voltage referred to -VS120VV9 Standby voltage referred to -VS120VV10 Mute voltage referred to -VS120VV11 Buffer voltage referred to -VS120VV12 Bootstrap loader voltage referred to -VS100 VIOO utput peak current10 APtotPower dissipation Tcase = 70 C50 WTopOperating ambient temperature range0 to 70 CTstg, TjStorage and junction temperature150 CVSS upply voltage (no signal) 60VV1 VSTANDBY GND voltage referred to -VS (pin 8)

5 90 VVESD_HBMESD maximum withstanding voltage range, test condition CDF-AEC-Q100-002- Human body model 1500 VTable data SymbolParameterMinTypMaxUnitRthj-caseThe rmal resistance junction to case C/WTDA7293 Electrical specificationsDoc ID 6744 Rev 85 Electrical characteristicsThe specifications given here were obtained with the conditions VS = 40 V, RL = 8 , Rg=50 , Tamb = 25 C, f = 1 kHz unless otherwise specified..Table characteristics SymbolParameterTest conditionsMinTypMaxUnitVSSupply range- 12- 50 VIqQuiescent current--50100mAIbInput bias AVOSI nput offset voltage--10-10mVIOSI nput offset APO Continuous output powerd = 1%, RL = 4 ,VS = 29 V758080-Wd = 10%, RL = 4 ,VS = 29 V90100100-WdTotal harmonic distortion (1) PO = 5 W, f = 1 = to 50 W,f = 20 Hz to 15 limiter thresholdVS 40 rate-510-V/ sGVOpen loop voltage gain--80-dBGVC losed loop voltage gain (2)

6 -293031dBeNTotal input noiseA = curve-1- Vf = 20 Hz to 20 kHz-310 VRiInput resistance-100--k SVRS upply voltage rejectionf = 100 Hz,Vripple = V RMS-75-dBTST hermal protectionDevice mutes-150- CDevice shuts down-160- CStandby function (ref. to to pin 1)VST onStandby on offStandby off Tst-byStandby attenuation-7090-dBIq st-byQuiescent current @ function (ref. to pin 1)VMonMute on off TmuteMute attenuatIon-6080-dBElectrical specificationsTDA72936/21 Doc ID 6744 Rev 8 Note:Pin 11 only for modular connection. Max external load 1 M / 10 pF, only for test purposesFigure application PCB and component layout Clip detectorDutyDuty cycle ( pin 5)d = 1%, RPULLUP = 10 k to 5 V-10-%d = 10%, RPULLUP = 10 k to 5 V304050%ICLEAK-PO = 50 W--3 ASlave function pin 4 (ref.)

7 To pin 8)VSlaveSlavethreshold---1 VVMasterMaster threshold-3--V1. Tested with optimized applications board (see fig. 3)2. GVmin 26dBTable characteristics (continued)SymbolParameterTest conditionsMinTypMaxUnitTDA7293 Circuit descriptionDoc ID 6744 Rev 87/213 Circuit descriptionIn consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon.

8 It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive , full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly device described has therefore been developed in a mixed bipolar-MOS high voltage technology called BCDII 100 Output StageThe main design task in developping a power operational amplifier , independently of the technology used, is that of realization of the output solution shown as a principle shematic by Fig6 represents the DMOS unity - gain output buffer of the of a DMOS unity-gain bufferThis large-signal.

9 High-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over frequency response; moreover, an accurate control of quiescent current is local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover descriptionTDA72938/21 Doc ID 6744 Rev 8 While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme.

10 Which exploits the direct connection of the Miller capacitor at the amplifier s output to introduce a local AC feedback path enclosing the output stage ProtectionIn designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions. Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which " dynamically" controls the maximum addition to the overload protection described above.


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