212 Series of Decoders - Farnell element14

1 HT12D/HT12F. 212 series of decoders Features Operating voltage: ~12V Built-in oscillator needs only 5% resistor Low power and high noise immunity CMOS Valid transmission indicator technology Easy interface with an RF or an infrared transmission Low standby current medium Capable of decoding 12 bits of information Minimal external components Binary address setting Pair with Holtek s 212 Series of encoders Received codes are checked 3 times 18-pin DIP, 20-pin SOP package Address/Data number combination - HT12D: 8 address bits and 4 data bits - HT12F: 12 address bits only Applications Burglar alarm system Car alarm system Smoke and fire alarm system Security system Garage door controllers Cordless telephones Car door controllers Other remote control systems General Description The 212 Decoders are a Series of CMOS LSIs for remote ously with their local addresses.

2 If no error or un- control system applications. They are paired with matched codes are found, the input data codes are Holtek s 212 Series of encoders (refer to the encoder/de- decoded and then transferred to the output pins. The VT. coder cross reference table). For proper operation, a pin also goes high to indicate a valid transmission. pair of encoder/ decoder with the same number of ad- The 212 series of decoders are capable of decoding dresses and data format should be chosen. informations that consist of N bits of address and 12-N. The Decoders receive serial addresses and data from a bits of data.

3 Of this Series , the HT12D is arranged to pro- programmed 212 Series of encoders that are transmitted vide 8 address bits and 4 data bits, and HT12F is used to by a carrier using an RF or an IR transmission medium. decode 12 bits of address information. They compare the serial input data three times continu- Selection Table Function Address Data VT Oscillator Trigger Package Part No. No. No. Type HT12D 8 4 L RC oscillator DIN active Hi 18 DIP, 20 SOP. HT12F 12 0 RC oscillator DIN active Hi 18 DIP, 20 SOP. Notes: Data type: L stands for latch type data output.

4 VT can be used as a momentary data output. Rev. 1 November 18, 2002. HT12D/HT12F. Block Diagram O S C 2 O S C 1. O s c illa to r D iv id e r D a ta S h ift D a ta L a tc h C ir c u it R e g is te r D IN B u ffe r D a ta D e te c to r S y n c . D e te c to r C o m p a ra to r C o m p a ra to r C o n tr o l L o g ic T r a n s m is s io n G a te C ir c u it B u ffe r V T. A d d re s s V D D V S S. Note: The address/data pins are available in various combinations (see the address/data table). Pin Assignment 8 -A d d re s s 8 -A d d re s s 1 2 -A d d re s s 1 2 -A d d re s s 4 -D a ta 4 -D a ta 0 -D a ta 0 -D a ta N C 1 2 0 N C N C 1 2 0 N C.

5 A 0 1 1 8 V D D A 0 2 1 9 V D D A 0 1 1 8 V D D A 0 2 1 9 V D D. A 1 2 1 7 V T A 1 3 1 8 V T A 1 2 1 7 V T A 1 3 1 8 V T. A 2 3 1 6 O S C 1 A 2 4 1 7 O S C 1 A 2 3 1 6 O S C 1 A 2 4 1 7 O S C 1. A 3 4 1 5 O S C 2 A 3 5 1 6 O S C 2 A 3 4 1 5 O S C 2 A 3 5 1 6 O S C 2. A 4 5 1 4 D IN A 4 6 1 5 D IN A 4 5 1 4 D IN A 4 6 1 5 D IN. A 5 6 1 3 D 1 1 A 5 7 1 4 D 1 1 A 5 6 1 3 A 1 1 A 5 7 1 4 A 1 1. A 6 7 1 2 D 1 0 A 6 8 1 3 D 1 0 A 6 7 1 2 A 1 0 A 6 8 1 3 A 1 0. A 7 8 1 1 D 9 A 7 9 1 2 D 9 A 7 8 1 1 A 9 A 7 9 1 2 A 9. V S S 9 1 0 D 8 V S S 1 0 1 1 D 8 V S S 9 1 0 A 8 V S S 1 0 1 1 A 8.

6 H T 1 2 D H T 1 2 D H T 1 2 F H T 1 2 F. 1 8 D IP -A 2 0 S O P -A 1 8 D IP -A 2 0 S O P -A. Pin Description Internal Pin Name I/O Description Connection Input pins for address A0~A11 setting A0~A11 (HT12F). NMOS These pins can be externally set to VSS or left open. I. Transmission Gate Input pins for address A0~A7 setting A0~A7 (HT12D). These pins can be externally set to VSS or left open. D8~D11 (HT12D) O CMOS OUT Output data pins, power-on state is low. DIN I CMOS IN Serial data input pin VT O CMOS OUT Valid transmission, active high OSC1 I Oscillator Oscillator input pin OSC2 O Oscillator Oscillator output pin VSS Negative power supply, ground VDD Positive power supply Rev.

7 2 November 18, 2002. HT12D/HT12F. Approximate internal connection circuits N M O S. T r a n s m is s io n G a te C M O S O U T C M O S IN O s c illa to r E N. O S C 2. O S C 1. Absolute Maximum Ratings Supply Voltage .. to 13V Storage Temperature ..-50 C to 125 C. Input Voltage .. to VDD+ Operating C to 75 C. Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil- ity.

8 Electrical Characteristics Ta=25 C. Test Conditions Symbol Parameter Min. Typ. Max. Unit VDD Conditions VDD Operating Voltage 5 12 V. 5V 1 mA. ISTB Standby Current Oscillator stops 12V 2 4 mA. IDD Operating Current 5V No load, fOSC=150kHz 200 400 mA. Data Output Source Current (D8~D11) 5V VOH= -1 mA. IO. Data Output Sink Current (D8~D11) 5V VOL= 1 mA. VT Output Source Current VOH= -1 mA. IVT 5V. VT Output Sink Current VOL= 1 mA. VIH H Input Voltage 5V 5 V. VIL L Input Voltage 5V 0 1 V. fOSC Oscillator Frequency 5V ROSC=51kW 150 kHz Rev. 3 November 18, 2002.

9 HT12D/HT12F. Functional Description Operation Flowchart 12. The 2 Series of Decoders provides various combina- The oscillator is disabled in the standby state and acti- tions of addresses and data pins in different packages vated when a logic high signal applies to the DIN pin. so as to pair with the 212 Series of encoders. That is to say, the DIN should be kept low if there is no The Decoders receive data that are transmitted by an signal input. encoder and interpret the first N bits of code period as P o w e r o n addresses and the last 12-N bits as data, where N is the address code number.

10 A signal on the DIN pin activates the oscillator which in turn decodes the incoming ad- S ta n d b y m o d e dress and data. The Decoders will then check the re- ceived address three times continuously. If the received N o D is a b le V T &. address codes all match the contents of the decoder s C o d e in ? ig n o r e th e r e s t o f th is w o r d local address, the 12-N bits of data are decoded to acti- vate the output pins and the VT pin is set high to indicate Y e s a valid transmission. This will last unless the address code is incorrect or no signal is received.