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74HC4017; 74HCT4017 Johnson decade counter with 10 …

1. General descriptionThe 74HC4017; 74 HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH. When cascading counters, the Q5-9 output , which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter . A HIGH on MR resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP1). Automatic code correction of the counter is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses.

The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR).

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Transcription of 74HC4017; 74HCT4017 Johnson decade counter with 10 …

1 1. General descriptionThe 74HC4017; 74 HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH. When cascading counters, the Q5-9 output , which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter . A HIGH on MR resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP1). Automatic code correction of the counter is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses.

2 Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of Features and benefits Wide supply voltage range from V to V Input levels: For 74HC4017: CMOS level For 74 HCT4017: TTL level Complies with JEDEC standard no. 7 A ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 Cto+85 C and from 40 Cto+125 C74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputsRev. 5 3 February 2016 Product data sheet Nexperia 2017. All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 2 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputs3.

3 Ordering information 4. Functional diagram Table informationType numberPackageTemperature rangeNameDescriptionVersion74HC401774HC4 017D 40 C to +125 CSO16plastic small outline package; 16 leads; body width mmSOT109-174HC4017DB 40 C to +125 CSSOP16plastic shrink small outline package; 16 leads; body width mmSOT338-174HC4017PW 40 Cto+125 CTSSOP16plastic thin shrink small outline package; 16 leads; body width mmSOT403-174HC4017BQ 40 Cto+125 CDHVQFN16 plastic dual in-line compatible thermal-enhanced very thin quad flat package; no leads; 16 terminals; body mmSOT763-174 HCT401774 HCT4017D 40 C to +125 CSO16plastic small outline package; 16 leads; body width mmSOT109-174 HCT4017BQ 40 Cto+125 CDHVQFN16 plastic dual in-line compatible thermal-enhanced very thin quad flat package; no leads; 16 terminals; body mmSOT763-1 Fig diagram DDK '(&2',1* $1' 287387 &,5&8,75< 67$*( -2+1621 &2817(54 &3 05 &3 4 4 4 4 4 4 4 4 4 4 Nexperia 2017.)))

4 All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 3 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputs Fig symbolFig logic symbol4 4 4 05 &3 &3 4 4 4 4 4 4 4 4 DDK &7 &7 &75',9 '(& DDK Fig diagram DDK )) '&35' 44)) '&35'44)) '&35'44)) '&35'44)) '&35'444 &3 &3 054 4 4 4 4 4 4 4 4 4 Nexperia 2017. All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 4 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputs Fig diagram DDK &3 ,1387&3 ,138705 ,13874 2873874 2873874 2873874 2873874 2873874 2873874 2873874 2873874 2873874 2873874 287387 Nexperia 2017.

5 All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 5 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputs5. Pinning Pinning Pin description (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to configuration SO16 and (T)SSOP16 Fig configuration DHVQFN16 +& +&7 4 9&&4 054 &3 4 &3 4 4 4 4 4 4 *1'4 DDK DDK +& +&7 4 4 4 4 4 4 4 &3 4 &3 4 05*1'4 4 9&&7 UDQVSDUHQW WRS YLHZ WHUPLQDO LQGH[ DUHD*1' Table descriptionSymbolPinDescriptionQ[0:9]3, 2, 4, 7, 10, 1, 5, 6, 9, 11decoded outputGND8ground (0 V)Q5-912carry output (active LOW)CP113clock input (HIGH-to-LOW edge-triggered)CP014clock input (LOW-to-HIGH edge-triggered)MR15master reset input (active HIGH)VCC16supply voltage Nexperia 2017.]

6 All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 6 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputs6. Functional description [1]H = HIGH voltage level;L = LOW voltage level;X = don t care; = LOW-to-HIGH transition; = HIGH-to-LOW transition;7. Limiting values [1]The input and output voltage ratings may be exceeded if the input and output current ratings are observed.[2]Ptot derates linearly with 8 mW/K above 70 C.[3]Ptot derates linearly with mW/K above 60 C.[4]Ptot derates linearly with mW/K above 60 table[1]MRCP0CP1 OperationHXXQ0 = Q5-9 = HIGH; Q1 to Q9 = LOWLH counter advancesL Lcounter advancesLLXno changeLXHno changeLH no changeL Lno changeTable valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).

7 Voltages are referenced to GND (ground = 0 V).SymbolParameterConditionsMinMaxUnitVC Csupply voltage +7 VIIK input clamping currentVI < V or VI>VCC+ V[1]- 20mAIOK output clamping currentVO< V or VO>VCC+ [1]- 20mAIOoutput current V < VO < VCC+ 25mAICC supply current-50mAIGND ground current 50-mATstgstorage temperature 65+150 CPtottotal power dissipationTamb = 40 C to +125 CSO16 package[2]-500mW(T)SSOP16 package[3]-500mWDHVQFN16 package[4]-500mW Nexperia 2017. All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 7 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputs8. Recommended operating conditions 9. Static characteristics Table operating conditionsSymbolParameterConditionsMinTy pMaxUnit74HC4017 VCCsupply voltage0-VCCVVO output voltage0-VCCV t/ Vinput transition rise and fall rate VCC = V--625ns/VVCC = = V--83ns/VTambambient temperature 40-+125 C74 HCT4017 VCCsupply voltage0-VCCVVO output voltage0-VCCV t/ Vinput transition rise and fall rate VCC = temperature 40-+125 CTable characteristicsAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).

8 SymbolParameterConditions25 C 40 C to +85 C 40 C to +125 CUnitMinTypMaxMinMaxMinMax74HC4017 VIHHIGH-level input voltageVCC= input voltageVCC= output voltageVI=VIHor VILIO= 20 A; VCC= 20 A; VCC= 20 A; VCC= mA; VCC= mA; VCC= Nexperia 2017. All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 8 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputsVOLLOW-level output voltageVI=VIHor VILIO=20 A; VCC= A; VCC= A; VCC= ; VCC= ; VCC= leakage currentVI=VCCor GND; VCC= AICC supply current VI=VCCor GND; IO=0A; VCC= ACIinput ----- pF74 HCT4017 VIHHIGH-level input voltageVCC= V to input voltageVCC= V to output voltageVI=VIHor VIL; VCC= 20 4 output voltageVI=VIHor VIL; VCC= leakage currentVI=VCCor GND; VCC= AICC supply current VI=VCCor GND; VCC= ; IO= A ICCadditional supply currentper input pin; VI=VCC V; other inputs at VCCor GND; VCC= V to V.

9 IO=0 ACP0 input-2590-113-123 ACP1 input-40144-180-196 AMR input-50180-225-245 ACIinput ----- pFTable characteristics ..continuedAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).SymbolParameterConditions25 C 40 C to +85 C 40 C to +125 CUnitMinTypMaxMinMaxMinMax Nexperia 2017. All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 9 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputs10. Dynamic characteristics Table characteristicsGND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure C 40 C to +85 C 40 C to +125 CUnitMinTypMaxMinMaxMinMax74HC4017tpdpro pagation delayCP0 to Qn; CP0 to Q5-9; seeFigure 10[1]VCC = V-63230-290-345nsVCC = V-2346-58-69nsVCC = V; CL=15pF-20- ---- nsVCC = V-1839-49-59nsCP1 to Qn; CP1 to Q5-9; seeFigure 10 VCC = V-61250-315-375nsVCC = V-2250-63-75nsVCC = V; CL=15pF-20- ---- nsVCC = V-1843-54-64nstPHLHIGH to LOW propagation delayMR to Q[1:9]; seeFigure 10 VCC = V-52230-290-345nsVCC = V-1946-58-69nsVCC = V-1539-49-59nstPLHLOW to HIGH propagation delayMR to Q5-9, Q0.

10 SeeFigure 10 VCC = V-55230-290-345nsVCC = V-2046-58-69nsVCC = V-1639-49-59nstttransition timesee Figure 10[2]VCC = V-1975-95-110nsVCC = V-715-19-22nsVCC = V-613-16-19nstWpulse widthCP0 and CP1 (HIGH or LOW); see Figure 9 VCC = V8017-100-120-nsVCC = V166-20-24-nsVCC = V145-17-20-nsMR (HIGH); seeFigure 9 VCC = V8019-100-120-nsVCC = V167-20-24-nsVCC = V146-17-20-ns Nexperia 2017. All rights reserved74HC_HCT4017 All information provided in this document is subject to legal data sheetRev. 5 3 February 2016 10 of 23 Nexperia74HC4017; 74 HCT4017 Johnson decade counter with 10 decoded outputstsuset-up timeCP1toCP0; CP0 to CP1; see Figure 8 VCC = V50 8-65-75-nsVCC = V10 3-13-15-nsVCC = V9 2- 11-13- nsthhold timeCP1toCP0; CP0 to CP1; see Figure 8 VCC = V5017-65-75-nsVCC = V106-13-15-nsVCC = V95-11-13-nstrecrecovery timeMR to CP0 and MR to CP1; seeFigure 9 VCC = V5 17-5-5-nsVCC = V5 6- 5-5- nsVCC = V5 5- 5-5- nsfmaxmaximum frequencyCP0 or CP1; seeFigure 9 VCC = = V3070-24-20-MHzVCC = V; CL=15pF-77- ---- MHzVCC = V2583-28-24-MHzCPDpower dissipation capacitanceVI = GND to VCC; VCC=5V; fi=1 MHz[3]-35- ---- pF74 HCT4017tpdpropagation delayCP0 to Qn; CP0 to Q5-9.


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