A High Linearity Low Noise Amplifier in a 0.35µm SiGe ...

1 A high Linearity Low Noise Amplifier in a m SiGe BiCMOS for wcdma applications A high Linearity Low Noise Amplifier in a m SiGe BiCMOS for wcdma applications Chih-Wei Wang high -Frequency IC Design Dept. enables multimedia wireless handhelds. A. Abstract frequency division duplex (FDD) scheme is In this paper, a low Noise Amplifier (LNA) in a adopted, which means that the transmitter and the m SiGe BiCMOS technology for wcdma receiver are active simultaneously. The frequency applications is presented. The designed LNA band is 1920 to 1980 MHz for uplink and 2110 to exhibits a Noise figure of dB and a power gain 2170 MHz for down link with 5 MHz channel of 20 dB. Besides, two different base bias circuits bandwidth. This 5 MHz nominal bandwidth are integrated in the LNA. One is a conventional includes a message bandwidth that corresponds to a resistor feed circuit, and the other is an active feed chip rate of Mcps and guard bands that are circuit.

2 By using the active biasing technique for used for adjacent channels isolation. The signal the base of the HBT, the 1-dB compression point power level at sensitivity for the lowest data rate is (P1dB) can be extended. Compared with the -117dBm. LNA is the first stage of the receiver resistor feed circuit, more than 8 dB improvement chain and its Noise characteristic dominates the in P1dB is achieved with the active feed circuit. overall Noise performance of the receiver. In The measured input P1dB and IP3 are dBm wcdma applications , the front-end LNA should and dBm, respectively. This LNA is packaged provide adequate gain with low Noise , low power in a QFN package and dissipates mA from a consumption, small size, and high Linearity . Besides, V supply. cross-modulation is one of the problems in CDMA. systems as a result of transmitting and receiving 1.

3 Introduction simultaneously [2]. It occurs when the transmitter power leakage gets cross-modulated on a strong The wide-band code division multiple access jammer in the LNA third-order nonlinearity and ( wcdma ) standard has been standardized by the causes a spectral contamination of the adjacent third-generation partnership project (3 GPP) forum receiver channel. Therefore a higher input-referred as a specification for the next generation digital third-order intercept point (IIP3) is required than in mobile phone applications [1]. This standard receiving only. supports high bandwidth data communication and In the recent years, SiGe HBT technology has SoC Technical Journal 123. A high Linearity Low Noise Amplifier in a m SiGe BiCMOS for wcdma applications made tremendous improvement in RF performance including transistor speed, gain and Noise figure.

4 RF performance of SiGe HBT is now superior to RF CMOS and competitive with GaAs HBT and FET, while maintaining rather low cost [3, 4]. The modern SiGe BiCMOS process has merged the bipolar device and MOSFET into the same technological platform [5]. In this paper, a two-stage LNA has been developed for wcdma . applications . This circuit was realized in a m SiGe BiCMOS process and packaged in a low cost Fig. 1 Measured fT and fmax as a function of collector current density for a unit SiGe HBT. QFN package. The measured result shows that our design has a state of the art performance. n 2IC f2 1 n2 (1). NF min = 1 + + ( re + rb )( 2 + )+. DC VT fT DC DC. 2. SiGe Device Verification high gain and low base resistance make the where f is the frequency of operation. Nearly all SiGe HBT ideal for high frequency LNA parameters in this equation are bias dependent applications .

5 In this design, the device with a except for VT, and they are function of dc collector collector-emitter breakdown voltage (BVceo) of current Ic. The NFmin can be improved by increasing V and an emitter width of m is used. The DC, fT, or decreasing rb. Fig. 2 shows the measured electrical behavior of the device is described NFmin for the unit device versus collector bias through a commercial Mextram 504 BJT model [6]. current at several frequencies. The NFmin was Although the nonlinear model is foundry-supplied, measured by an ATN-NP5B system from 2 to some high frequency characteristics are verified by GHz. In our experience, excess Noise was on-wafer measurements further. Fig. 1 shows the demonstrated to come from the lossy pad. In order measured unity gain cutoff frequency (fT) and to obtain accurate NFmin, a Noise correlation matrix maximum oscillation frequency (fmax) for the unit method [8] is performed to de-embed this effect.

6 In transistor with an emitter area of 24 m2 as a Fig. 2, the NFmin decreases as the biasing current function of collector current density Jc. This device increases in the low current region. This is because exhibits a peak fT of 43 GHz and a peak fmax of 59 rb decreases and DC increases with the increasing GHz. of biasing current, respectively. And the NFmin The minimum Noise figure (NFmin) for a BJT in increases in the high current region when the shot a common-emitter configuration can be shown by noises from the bias currents start to dominate the equation (1) [7] Noise figure. It is also found that the lowest value of NFmin around 2 GHz occurs at a collector current of only mA, over an order of magnitude below the 124 002 . A high Linearity Low Noise Amplifier in a m SiGe BiCMOS for wcdma applications current density at the peak of fmax, suggesting that a LNA is composed of two common-emitter stages very low power consumption and low Noise with inductive emitter degeneration, mainly Amplifier should be feasible in this SiGe HBT realized with the bonding wires to the die pad of the technology.

7 Package. The emitter area of the first stage is The unit transistor with an emitter size of 24 selected to be 48 m2, which is composed of two m2 features a low NFmin of about 1 dB in the unit transistors in parallel. The second stage wcdma band, and it will be used in the LNA Amplifier has the same emitter size. Each stage is design and biased at a collector current of mA. biased at a collector current of about 3 mA and a The process also provides 3 levels of metal for collector voltage of V. The selected transistor interconnections with 3 m top metal layer, MIM size enables a simple trade-off between Noise capacitors of 1 fF/ m2 and various types of matching and 50 Ohm input matching. The first resistors and inductors. stage is optimized for Noise performance, and the second one is optimized for gain and Linearity . Considering the stability, the ground paths of the two stages are separated on chip.

8 In order to minimize the Noise contributions from the lossy pads, the ground shielding technique is used on the input and output signal pads. Base Bias Circuit LNAs with wide dynamic range are necessary to CDMA systems for high communication quality. At low input signal levels, very low Noise figure Fig. 2 Measured NFmin as a function of collector and high gain are required. At high input signal current for a unit SiGe HBT with an emitter area of 24 m2 levels, a high 1-dB compression point is required to ensure Linearity . As to RF amplifiers with BJT. devices, the design of base bias circuit is an 3. Circuit Design important issue to achieve high P1dB and high Linearity [9]. Amplifier Stage As shown in Fig. 3, the proposed LNA has two different base bias circuits integrated in parallel, Simulation is carried out in ADS environment and the two bias circuits can work individually.

9 Using both small signal and harmonic balance Namely, the base bias can be fed through Vref1 or analysis. In order to simplify the circuit, a Vref2. When biasing to Vref1, node Vref2 is kept open. single-ended topology is chosen. Fig. 3 shows the The bias network through Vref1 is composed of simplified schematic of the LNA. The designed active feed circuit 1 and active feed circuit 2 in the SoC Technical Journal 125. A high Linearity Low Noise Amplifier in a m SiGe BiCMOS for wcdma applications form of the current mirror. The bias transistors As mentioned in section A, the second stage of 2. Q3-Q6 have the same emitter area of m . In this LNA is optimized for Linearity . In order to large signal operation, the bias point of the eliminate the drawback of active feed circuit 1, the Amplifier transistor Q1 varies according to the RF resistor for Noise chock is not adopted in active feed input power level.

10 Since the transistor Q1 is deep circuit 2. To prevent the large input signal from class-AB biased, when a large RF input signal is changing the bias point of Q4, a resistor Rb4 is used. applied to the base emitter junction of Q1, the large Because the Noise figure of a two-stage LNA is positive voltage signal and large negative current dominated by the first stage, the Noise contributions signal are compressed due to the I-V characteristic from active feed circuit 2 can be reduced by the of the base emitter diode. Therefore, the rectified gain of the first stage, and the overall Noise average dc current of the base emitter diode performance is not degraded. Besides, without the increases, and the base emitter voltage VBE1 chock resistor, the power leaked to Q5 increases as decreases as input power increases [10]. The input power increases, and the large input signal is decrease of VBE1 versus the large input power also clipped between the base emitter junction of results in gain compression.