A Simplified GPS-Derived Frequency Standard

1 14 Sep/Oct 2006242 Robert-Martial StGatineau, Qu bec J9J Simplified GPS-DerivedFrequency StandardBertrand Zauhar, VE2 ZAZHere is a simple and modern approach to a 10-MHz many reasons, an accurate frequencystandard at an Amateur Radio stationis desirable. For weak-signal operationsuch as EME (moonbounce) at microwavefrequencies, you must be transmitting and lis-tening exactly at the right Frequency ; other-wise the narrow receive filters used will makeyou miss that weak signal. With such a setup,a 10-MHz Frequency reference feeds the fre-quency synthesizer that generates the radio soperating Frequency . An accurate 10-MHzreference is also useful for test equipmentadjustment. With an accurate Standard , youcan put Frequency counters and signal gen-erators on advent of the Global Positioning Sys-tem (GPS) has allowed a Simplified approachto time and Frequency accuracy. Several com-mercially available GPS receiving units pro-vide a 1 pulse-per-second (pps) signal. Thissignal typically exhibits a short-term accu-racy of 1 microsecond (1 ppm or 1 10 6).

2 Figure 1 Block diagram of the GPS-Derived Frequency with permission; copyright ARRL Sep/Oct 2006 15By averaging it over a long period, a muchbetter accuracy can be achieved. This is whatthis project does: it locks an external 10-MHzvoltage-controlled signal source to the 1 ppsGPS good work of Brooks Shera1 has gen-erated a lot of interest within a broad commu-nity of experimenters who want to increase thelevel of Frequency accuracy available to themat low cost. His system uses a PLL techniqueto lock an external oscillator to a GPS receiverand obtain an accurate Frequency project I present here provides asimpler and more modern approach to aGPS- derived 10-MHz Frequency found in today s technologyoffer the following benefits: solid perfor-mance, more features and a reduction in thenumber of design differentiates itself from otherpreviously published designs because: It uses a simpler Frequency measurementtechnique, as opposed to phase measure-ment. It provides on-board reference buffering andfan-out with 50- output impedance.

3 It provides the three most common refer-ence frequencies of 10 MHz, 5 MHz and1 MHz. It provides full software control of the fre-quency acquisition and control processes,without DIP switches. It has fewer components and does not re-quire an external DAC or external inputcounter chips. It runs off only one supply voltage: +5 V dc(excluding the VCXO supplies).Tests have shown that this system consis-tently produces a short-term reference accu-racy in the 1 10 10 range. This is derived us-ing Standard automotive-grade GPS range of accuracy does not rival cesium-based references. It is much better than mostof the Standard built-in, free-running oscilla-1 Notes appear on page 2 Schematic diagram of the GPS-Derived Frequency Standard Sep/Oct 2006tors seen in commercial test instruments, how-ever. Just to give you an idea of the type ofaccuracy, one part in 1010 represents an errorof one hertz on a 10 GHz signal!System DescriptionFigure 1 shows a block diagram of myGPS- derived Frequency Standard .

4 The systemoperates a hardware/firmware Frequency -locked loop (FLL). In essence, the system com-pares a local Frequency source (an externaloscillator) to a GPS-Derived reference. It willadjust the local 10-MHz variable source tomatch the GPS-Derived 1 pps reference. The10-MHz source is kept aligned with respectthe 1-Hz GPS reference on a real-time basisby the firmware. The resulting 10-MHzreference is fanned out, Frequency -divided andprovided to the user for high-accuracy appli-cations. System control and monitoring areachieved using a bicolor LED and a serial portconnected to a terminal (PC).Hardware DescriptionFigure 2 shows the system circuit sche-matic. The main operation consists of count-ing the number of rising edges produced bythe 10-MHz voltage-controlled crystal oscil-lator (VCXO) signal over a 16 s period (16 GPS pulses). If the GPS and the VCXO areat the same Frequency , exactly 160,000,000pulses will be counted ( 1 pulse, inherent tocounter technology).

5 Prior to entering the microcontroller, the10-MHz VCXO signal is buffered and am-plified by U1, a receiver chip. An optionalinput termination resistor R1 can be added ifthe VCXO s output circuit calls for one. Thebuffered 10-MHz reference signal is fannedout to several locations on the , the Microchip PIC18F2220 micro-controller, has a built-in 16-bit counterincremented by an external source, theVCXO. The counter value is latched by an-other external signal rising edge, the GPS1 pps signal in our application. This processis totally autonomous and independent fromfirmware. The microcontroller s task in thisprocess is to analyze the results and adjustthe VCXO Frequency Frequency ControlThe Microchip PIC18F2220 microcon-troller does not have an integrated digital-to-analog converter (DAC). To produce anadjustable voltage source to vary the VCXO Frequency , the built-in 10-bit pulse-widthmodulator (PWM) is used instead. A continu-ous rectangular-wave output is produced by thePWM.

6 A downstream external 1-Hz, two-stagelow-pass filter (U5A, U5B and discrete com-ponents) is used to recover the average dcvalue of the PWM output. By varying the dutycycle of the PWM, it is possible to producean accurate analog dc voltage with 210 or 1024steps over the DAC of 14-bit resolution is achievedby precisely controlling the duty cycle of thePWM output. This translates to a tuninggranularity of 6 10 5 Hz for a VCXO thathas a 1-Hz tuning range. Achieving a 14-bitDAC using a 10-bit PWM requires additionalfirmware processing. The idea is to dither the pulse width within a 16-cycle 16 cycles translate into an additional4-bit resolution. For example, increasing the14-bit DAC output by one step involves in-creasing the 10-bit PWM output width by oneincrement on one of the 16 pulses. Increas-ing the DAC by two steps means increasingthe 10-bit PWM output width by one incre-ment on two of the 16 pulses, and so add flexibility for interfacing with vari-ous VCXOs, the filtering stages have a supplybypass feature that allows you to feed theoperational amplifiers with different upperand lower rail voltages.

7 This is done byreconfiguring JP2 and C17. Remember,though, that the maximum voltage differencebetween upper and lower rails must be kept to12 V or less. Another feature, the second stageof low-pass filtering, allows for additional gainusing R7/R8 if the VCXO operates on a largertuning voltage range than the more standard5-V range. A 5-V offset can also be added tothe second stage using jumper JP3. This pro-vides support for VCXOs that have a 5 V to+5 V tuning 1 lists some of the possible configu-rations on the filtering stages for variousVCXO tuning ranges. Finally, the tuningslope sign can be set in firmware to accom-modate both types of ReferencesThe system provides up to four 10-MHzreference signals. In addition, it provides upto two references with a selectable frequencyof either 5 MHz or 1 MHz. These sub-ratesare produced by U2, a synchronous active sub-rate is selected with an on-board jumper, JP1. All references are of50- output impedance and provide an am-plitude of greater than 1 V pk-pk with asquare wave shape.

8 These signals are pro-vided by U3, a line driver the firmware feature is enabled, thereference outputs are inhibited if the FLLgoes into its unlocked state. That protectionensures that the user does not use a referenceof unknown quality. LED D2 provides anindication of the reference output Status LEDThe system provides basic FLL status andalarm conditions with a single bicolor LED(D1). The LED control is designed to allowthe user to learn about the current and past FLLstatus in a lapse of a single second. Being acombined green/red LED pair in a single pack-age, it can produce three colors: green, red andamber. The latter is produced when both greenand red LEDs are simultaneously on. Addi-tionally, the LED unit will flash at a 1-Hz rateto provide a 1 pps signal sanity PortSince the FLL status LED only providesbasic FLL status and alarm, a serial port is alsoimplemented. The serial port provides com-prehensive control and monitoring of the FLLand other firmware features.

9 When interfacedthrough a TTL-to-RS232 bidirectional con-verter, the serial port will connect to a personalcomputer RS-232 port. Such a converter canbe easily assembled using a couple of transis-tors or can be made using Maxim s MAX23xseries of conversion chips. The Internet hasseveral simple circuits documented. It can alsobe purchased off-the-shelf. The serial port is ASCII-character-basedTable 1 Tuning Range ConfigurationVCXO Tuning RangeR7R8C17JP2 Upper Rail JP3 Offset0 to +5 VLeave OpenJumper wireJumper wirePosition ALeave Open0 to +8 V *100 k 62 kJumper wirePosition BPosition A0 to +10 V *100 k100 kJumper wirePosition BPosition A 5 V to +5 V **100 k100 FPosition APosition B*External positive supply required.**This configuration is used with the HP 10544/10811 series OCVCXO s. External 5 V supply required. Sep/Oct 2006 17 Figure 3 Circuit board pattern for the GPS-Derived Frequency 4 FLL acquisition and control provides Standard status text strings thatcan be captured and analyzed by the serial port also interprets a series of usercommands to control the FLL and other firm-ware features.

10 Additional information on thetext strings and user commands can be foundon my Web +5 V dc Voltage RegulatorTo guarantee a stable and clean voltagesupply to the board, a separate +5 V dc fixedvoltage regulator, VR1, is used. A heatsinkis required on the regulator since the boardcould potentially draw close to 200 mA whenall reference outputs are terminated. Thiswould make the voltage regulator excessivelyhot without a VCXOS ystem performance is set to a large de-gree by the external 10-MHz VCXO selectedfor this design. It is recommended that anoven-controlled VCXO (OCVCXO) be usedto provide better short term stability. Good,second-hand Hewlett-Packard OCVCXO sare readily available on These shouldbe your primary project has been tested and provenwith OCVCXOs that have a 1-Hz or a 10-Hztuning range over their entire control volt-age. Different tuning slopes may require dif-ferent firmware parameter settings to achieveoptimum performance. The user will wantto experiment with Receiving UnitThe GPS receiver used on this systemmust have a 1 pps TTL-compatible outputsignal.