### Transcription of Analog to Digital ADC and Digital to Analog DAC Converters

1 Session 1559. **Analog** to **Digital** (ADC) and **Digital** to **Analog** (DAC) **Converters** M. Rabiee Eastern Kentucky University Introduction: Electric voltage and current signals are often referred to as **Analog** signals. **Analog** signals must be converted to **Digital** signals prior to input into computers. **Analog** to **Digital** **Converters** (ADCs) are used to convert **Analog** signals to **Digital** signals. Inversely, the computer output that is in **Digital** form must sometimes be converted to an **Analog** signal prior to input to an electronic or electrical device. **Digital** to **Analog** **Converters** (DACs) are used to perform this operation. In this paper we will examine important characteristics associated with ADC/ DAC **Converters** . In addition, we will explain how to specify a **converter** to meet the requirements of a specific system. We will also state and describe different types of ADC / DAC **Converters** . Binary-weighted, and R- 2R Ladder type DAC circuits will be displayed and analyzed.

2 Parallel Comparator or Flash, Dual Slope, and Successive Approximation type ADC circuits will be displayed and analyzed. We will explain extensively the advantage / disadvantage criteria associated with each type of ADC or DAC **Converters** . Finally, two computer interfacing laboratory assignments will demonstrate the constructions of the R-2R Ladder type DAC, and Successive Approximation type ADC **Converters** . **Digital** to **Analog** **converter** (DAC) Characteristic: When we select a **Digital** to **Analog** **converter** (DAC) chip for an application, we must consider three characteristic associated with a DAC. First, resolution or step size defines the smallest voltage or current change possible for the DAC output signal. For example, an 8-bit DAC. that generates a maximum output voltage of 5 volts has a step size or resolution of (5V / 2 8 ) = mV. Sometimes, the resolution is stated in the percentage value. For the 8-bit DAC, the percent resolution is (1 / 2 8 ) x 100 = Settling time is the time required for the DAC output to settle to of its new value.

3 Typical settling time for a commercial DAC is 300 nanoseconds. Accuracy is used to state the percentage of actual output of a DAC to expected output. Usually the accuracy is 50% of the step size. For the 5 V, 8-bit DAC the accuracy is mV. This implies that the maximum output is guaranteed by the DAC manufacturer to be within and **Digital** to **Analog** **converter** (DAC) types: There are two methods of constructing a DAC; Binary Weighted type, and R-2R Ladder type. Figure 1 displays an 8-bit binary weighted type DAC circuit. The output voltage for a binary weighted DAC is found using the following equation. V OUT = ( V REF ) * ( R F / R ) * ( D7 / 2 0 + D6 / 2 1 + .. + D1 / 2 6 + D0 / 2 7 ). Note that the switches represent transistors that can be opened ( , operates in turned off, or open collector to emitter state), or closed ( , operates in turned on, or saturated state). Page Session 1559. Figure 1.

4 8-bit, Binary Weighted Type DAC. The advantage of a binary weighted DAC circuit is due to its simplistic construction with fewer electronic components. However, the disadvantage is that as the number of input bits increases, the value of the current on the least significant bit (D0) branch will decrease. This reduction in current value will eventually be significant enough to distort the current signal in the branch that has the switch for the least significant bit. To solve this problem, most DACs are constructed using R-2R Ladder type circuits. Figure 2 displays an 8-bit R-2R Ladder type DAC. circuit. In order to analyze the circuit, assume that all bits except one are connected to the ground. Then, equivalent resistance is calculated by realizing that two 2R resistors are in parallel, which will generate an equivalent value of R. Next, this equivalent resistor is in series with another R to produce an equivalent resistance of 2R.

5 This process continues until the number of resistors in the circuit are reduced to a couple of 2R resistors. Figure 3 displays the equivalent circuit when D7 is connected to +5V. Now we can find the Thevenin Equivalent Circuit of the section to the left of the Operational Amplifier (Op-Amp), and proceed to calculate the output voltage generated by the associated bit. The following equation represents the DAC output voltage for the R-2R Ladder type circuit. V OUT = ( V REF ) * ( R F / 2R ) * ( D7 / 2 0 + D6 / 2 1 + .. + D1 / 2 6 + D0 / 2 7 ). Page Session 1559. Figure 2. 8-bit, R-2R Type **Digital** to **Analog** **converter** . Figure 3. R-2R Equivalent Circuit when only bit seven (D7) is on. **Digital** to **Analog** **converter** (DAC) Lab Assignment: Students use the electronic circuit simulation packages available [1,2] in the computer lab to analyze the binary weighted and R-2R Ladder type circuits. In addition, a lab assignment illustrates the construction of a R-2R Ladder type DAC, and the use of this circuit to generate waveforms.

6 Figure 4 shows the wiring diagram of the DAC lab assignment. We have used a computer interface card to connect the DAC circuit to a personal computer. A complete description of the interface card, and its associated address decoder circuit are in a previously published paper [3]. The Y1 output of the 74LS138, three-to-eight decoder chip represents address 301 Hex =769. Decimal. Once the circuit is wired and connected to the computer and oscilloscope, the program listed Page in Appendix A is used to check the validity of the value of each DAC bit. Finally, the programs Session 1559. listed in Appendix B are used to generate different types of waveforms. The MC1408 **Digital** to **Analog** **converter** chip manufactured by Motorola [4] is a typical 8-bit DAC chip. Figure 5 shows the wiring diagram of the MC1408 DAC chip[5]. BEN'. Figure 4. Wiring Diagram of R-2R Ladder Type DAC Lab Assignment Page Figure 5.

7 MC1408 **Digital** to **Analog** **converter** (DAC). Session 1559. **Analog** to **Digital** **converter** (ADC): When selecting an **Analog** to **Digital** **converter** (ADC) chip for an application, three characteristics must be considered. Similar to selecting a DAC, these characteristics are; number of bits, accuracy, and speed. There are three different methods used for constructing **Analog** to **Digital** **Converters** . These ADC types are; Parallel Comparator or Flash type, Dual-Slope type, and Successive Approximation type. Figure 6 displays a 3-bit, flash type ADC circuit. The voltage divider provides eight reference voltages on the negative poles of the operational amplifiers. The unknown input voltage is compared to each one of the reference voltages. If the input voltage is greater than any one of the reference voltages, the associated Op-Amp will be saturated to its positive supply voltage level. The eight-to-three encoder will generate an appropriate three bit binary word according to the inputs A0.

8 Through A7. For example, assume A4 is the only input to the encoder that is set. That would mean that the input voltage is , and the output binary number will be 100. The advantage of a Flash type ADC is its instantaneous speed. The Flash type ADC is expensive due to the large numbers of OP-Amp devices contained therein. For example, an 8-bit flash type ADC requires 2 8 -1 = 255 Op-Amps. Flash type ADCs are used in special applications such as systems used by the military or NASA. Page Figure 6. Three-bit, Flash Type **Analog** to **Digital** **converter** Circuit Session 1559. In the Dual Slope ADC type, a capacitor is connected to input voltage and allowed to charge up for a fixed amount of time. Then, the capacitor is connected to the ground and allowed to discharge. The time required for the capacitor to discharge is calibrated to reflect the value of the input voltage. Figure 7 illustrates the operation of the Dual Slope type ADC.

9 These type of ADCs are very slow, and are usually found in electronic voltmeters. Figure 7. Operation of the Dual-Slope Type **Analog** to **Digital** **converter** Figure 8 displays a block diagram of a successive approximation ADC. In the successive approximation ADC, the output of a comparator is connected to the input of a special counter register called a Successive Approximation Register (SAR). Page Session 1559. The OP-Amp comparator is used to compare the unknown input voltage to the output of a DAC. The successive binary numbers generated by the SAR are fed into the DAC. Upon receiving an active signal from the Start Conversion line, the SAR will turn its Most Significant Bit (MSB). on. If the output from the comparator is low, the bit will be turned off, otherwise the MSB will be kept on. Next, the second highest bit on the SAR is turned on, and the decision is made to keep the bit on, or turn it off.

10 This process will continue until the Least Significant Bit (LSB) is checked. Then a signal from the End Of Conversion line will enable the octal latch in order to have the data released onto the data lines. If we connect the End Of Conversion line to the Start Conversion . line as shown in Figure 8, the conversion will be continuous. Figure 9 illustrates the operation of the successive approximation type ADC. Note that every conversion requires eight (8) clock pulses. Therefore, the successive approximation type ADC. converts faster than the Dual Slope type ADC. Figure 9. Operation of the Successive Approximation Type ADC. Page Figure 8. Block Diagram of the Successive Approximation Type ADC. Session 1559. Most of the commercially available ADCs are the successive approximation type. Figure 10. displays a connection diagram of the 0804 ADC [5]. This chip is manufactured by the National Semiconductor Corporation [6].