AWR1642 Single-Chip 77- and 79-GHz FMCW Radar …

1 ADVANCE INFORMATIONP roductFolderOrderNowTechnicalDocumentsTo ols &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand pre-productionproducts; MAY2017 AWR1642 Single-Chip77- and 79-GHzFMCWR adarSensor1 FMCWT ransceiver IntegratedPLL,Transmitter,Receiver,Baseb and,and A2D 76- to 81-GHzCoverageWith4 GHzAvailableBandwidth FourReceiveChannels Two TransmitChannels Ultra-AccurateChirp(Timing)EngineBasedon Fractional-NPLL TX Power:12 dBm RX NoiseFigure: 15 dB (76 to 77 GHz) 16 dB (77 to 81 GHz) PhaseNoiseat 1 MHz.

2 94 dBc/Hz(76 to 77 GHz) 91 dBc/Hz(77 to 81 GHz) Built-inCalibrationand Self-Test(Monitoring) ARM Cortex -R4F-BasedRadioControlSystem Built-inFirmware(ROM) Self-calibratingSystemAcrossFrequencyand Temperature C674xDSPfor FMCWS ignalProcessing On- Cortex-R4 FMicrocontrollerfor ObjectTrackingandClassification,AUTOSAR, and InterfaceControl SupportsAutonomousMode(LoadingUserApplic ationfromQSPIF lashMemory) IntegratedPeripherals InternalMemoriesWithECC HostInterface CAN(TwoInstances,One BeingCAN-FD) OtherInterfacesAvailableto UserApplication Up to 6 ADCC hannels Up to 2 SPI Channels Up to 2 UARTs I2C GPIOs 2-LaneLVDSI nterfacefor RawADCD ataandDebugInstrumentation ASILB Capable AECQ100 Qualified AWR1642 AdvancedFeatures EmbeddedSelf-monitoringWithNo HostProcessorInvolvement ComplexBasebandArchitecture EmbeddedInterferenceDetectionCapability PowerManagement Built-inLDON etworkfor EnhancedPSRR I/Os ClockSource SupportsExternalOscillatorat 40 and 50 MHz

3 SupportsExternallyDrivenClock(Square/Sin e)at 40 and 50 MHz EasyHardwareDesign , ChipBGAP ackagefor EasyAssemblyandLow-CostPCBD esign SmallSolutionSize BlindSpotDetection LaneChangeAssistance CrossTrafficAlert ParkingAssistance OccupancyDetection SimpleGestureRecognition Car DoorOpenerApplicationsADVANCE INFORMATIONRX1RX2RX3RX4TX2 AntennaStructureTX1 Radar Front EndIntegrated MCUARM Cortex-R4F CANP ower Management40-MHz CrystalSerialFLASHDCANPHYA utomotiveNetworkIntegrated DSPTI C674x AWR1642 CAN FDMCANPHYA utomotiveNetworkQSPI2 AWR1642 SWRS203.

4 AWR1642 DeviceOverviewCopyright 2017,TexasInstrumentsIncorporated(1)For moreinformation,see Section10,MechanicalPackagingand AutonomousRadarSensorFor AWR1642deviceis an integratedsingle-chipFMCW radarsensorcapableof operationin the 76- builtwithTI s low-power45-nmRFCMOS processandenablesunprecedentedlevelsof integrationin an AWR1642is an idealsolutionfor low-power,self-monitored,ultra-accurater adarsystemsin the a self-containedFMCW radarsensorsingle-chipsolutionthat simplifiestheimplementationof AutomotiveRadarsensorsin the bandof 76 to 81 is built on TI s low-power45-nm RFCMOS process,whichenablesa monolithicimplementationof a 2TX,4 RXsystemwith built-inPLLand integratesthe DSPsubsystem,whichcontainsTI's highperformanceC674xDSPfor the deviceincludesan ARMR4F-basedprocessorsubsystem,whichisre sponsiblefor radioconfiguration,control,and widevarietyof sensorimplementation(Short,Mid.)

5 Long)withthe possibilityof dynamicreconfigurationfor implementinga ,the deviceis providedas a completeplatformsolutionincludingreferen cehardwaredesign,softwaredrivers,samplec onfigurations,API guide,and (1)PARTNUMBERPACKAGEBODYSIZEX1642 BIGABL(Tray)FCBGA(161) INFORMATIONS erial Flash interfaceOptional External MCU interfacePMIC controlPrimary communication interfaces (automotive)For debugJTAG for debug/developmentHigh-speed ADC output interface (for recording)High-speed input for hardware-in-loop verificationIF ADCD igital Front End(Decimation filter chain)LNAIF ADCLNAIF ADCLNAIF ADCLNAPAPAS ynth (20 GHz)Ramp @ 200-MHz(User programmable)Prog RAM(256kB*)Data RAM(192kB*)Boot ROMQSPISPISPI / I2 CDebug UARTsDCANDMATest/DebugADC BufferLVDSRF/Analog subsystemMaster subsystem(Customer programmed)* Up to 512KB of Radar Data Memory can be switched to the Master R4F if required6 DSP subsystem(Customer programmed)MailboxBus MatrixHILC674x DSP@600 MHzL1P (32KB)L1D (32KB)L2 (256KB)

6 DMACRCR adar Data Memory(L3)768KB* RF Control/BISTCAN-FDCopyright 2017, Texas Instruments MAY2017 SubmitDocumentationFeedbackProductFolder Links: AWR1642 DeviceOverviewCopyright 2017, INFORMATION4 AWR1642 SWRS203 : AWR1642 RevisionHistoryCopyright 2017,TexasInstrumentsIncorporatedTableof Contents1 TerminalConfigurationand (POH).. FCBGAP ackage[ABL0161].. Monitoringand Applications,Implementation,and Deviceand Mechanical,Packaging,and RevisionHistoryNOTE:Pagenumbersfor previousrevisionsmay differfrompagenumbersin the 2017*InitialReleaseADVANCE MAY2017 SubmitDocumentationFeedbackProductFolder Links: AWR1642 DeviceComparisonCopyright 2017,TexasInstrumentsIncorporated(1)ADVA NCEINFORMATION concernsnew productsin the samplingor preproductionphaseof subjectto DeviceComparisonTable3-1.

7 DeviceFeaturesComparisonFUNCTIONAWR1243 AWR1443 AWR1642 Numberof receivers444 Numberof transmitters332On-chipmemory B-CapableMax interface(MHz)1555 Max real samplingrate (Msps) (R4F) YesYesDSP(C674x) YesPeripheralsSerialPeripheralInterface( SPI)ports112 QuadSerialPeripheralInterface(QSPI) YesYesInter-IntegratedCircuit(I2C) interface 11 ControllerAreaNetwork(DCAN)interface YesYesCANFD YesTrace YesPWM YesHardwareIn Loop(HIL/DMM) YesGPADC YesYesLVDS/DebugYesYesYesCSI2 Yes Hardwareaccelerator Yes 1-V bypassmodeYesYesYesCascade(20-GHzsync)Ye s JTAG YesYesProductstatus(1)PRODUCTPREVIEW(PP) ,ADVANCEINFORMATION(AI),or PRODUCTIONDATA(PD)AIAIAIADVANCE INFORMATION6 AWR1642 SWRS203.

8 AWR1642 DeviceComparisonCopyright 2017, informationaboutotherdevicesin this familyof productsor relatedproductssee the linksthat s mmWavesensorsrapidlyand accuratelysenserange,angleand velocitywithless powerusingthe smallestfootprintmmWavesensorportfoliofo r s automotivemmWavesensorportfoliooffershig h-performanceradarfrontendto ultra-highresolution, sscalablesensorportfolioenablesdesignand developmentof ADAS systemsolutionforeveryperformance,applic ationand sensorconfigurationrangingfromcomfortfun ctionstosafetyfunctionsin all AWR1642 Reviewproductsthatarefrequentlypurchased or usedinconjunctionwith this AWR1642TI DesignsReferenceDesignLibraryis a robustreferencedesignlibraryspanninganal og,embeddedprocessorand TI expertstohelp you jump-startyoursystemdesign,all TI Designsincludeschematicor blockdiagrams.

9 BOMsand designfilesto speedyourtimeto INFORMATION1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A B C D E F G H J K L M N P R Not to scaleVSSAVOUT_PAVSSAVSSAVSSAGPIO_46 VOUT_14 APLL1 VOUT_14 SYNTHOSC_CLKOUTVSSAVSSAVOUT_PAVSSATX1 VSSATX2 VSSAGPIO_45 GPIO_44 VBGAPVIN_18 CLKVIN_18 VCOGPADC5 GPIO_40 GPIO_41 VSSAVIN_13RF2 VSSAVSSAVSSAVSSAVSSAGPIO_43 GPIO_42 SPIA_cs_nGPADC6 CLKPVIN_13RF2 SPIA_mosiGPIO_39 CLKMVSSAVSSAVSSAVSSVSSVSSVSSVSSSPIA_clkS PIA_misoVIOIN_18 DIFFRX4 VSSAVIN_18 BBVSSVSSSPIB_mosiSPIB_clkVIOINVSSAVSSAVS SAVIN_13RF1 VSSVSSVSSVSSSYNC_OUTSPIB_misoVIN_SRAMRX3 VSSAVIN_13RF1 VSSVSSVSSGPIO_0 SPIB_cs_nVDDINVSSAVSSAVSSAVIN_13RF1 VSSVSSVSSVSSGPIO_1 LVDS_TXP0 LVDS_TXM0RX2 VSSAVIN_18 BBVSSVSSVSSVSSVSSGPIO_2 LVDS_TXP1 LVDS_TXM1 VSSAVSSAVSSAVSSVSSVSSVSSVPPLVDS_CLKPLVDS _CLKMRX1 VSSALVDS_FRCLKPLVDS_FRCLKMVSSAVSSAVSSArs 232_rxrs232_txnERROR_OUTnERROR_INMCU_CLK OUTWarm_ResetTMSVDDINQSPI[1]

10 TDOGPIO_48 GPIO_47 GPADC1 GPADC2 GPADC3 SYNC_inGPIO_32 GPIO_34 GPIO_36 GPIO_38 PMIC_CLKOUTTCKQSPI_cs_nQSPI[3]SPI_HOST_I NTRVNWAVDDINVSSAGPADC4 NRESETGPIO_31 GPIO_33 VDDINGPIO_35 GPIO_37 VIOIN_18 VIOINTDIQSPI_clkQSPI[0]QSPI[2] MAY2017 SubmitDocumentationFeedbackProductFolder Links: AWR1642 TerminalConfigurationand FunctionsCopyright 2017,TexasInstrumentsIncorporated4 TerminalConfigurat