Transcription of CDTLab
1 2012 CDTLab file: 2 [ 2 ] 1. 2 4 3 5 1. 80 50 80 50 80 VRRM IF(AVE) : IFSM 25 C Tj : Tstg VFM SBD Trr) 1/10 recovery time 30 100 S FRD 3 S SFRD 100 300 S LLD 35 100 S (a)DC_VRD+E E T 50Hz/60Hz 30 100 S 1KH FRD(Fast Recovery Diode SBD SBD 100 1500V 3 S FRD 500KH 100V SBD(Schottky Barrier Diode) FRD FRD 100V (a)
2 AC100V PT1 AC10V D1 C1 R1 (b) 50Hz10 Vpp (c) C1 1 C1 (d) C1 25 F C1 R1 C1 R1 2(Rectification_Half-wave(2).sxsch) D1C1R1AC100 VPT1 a d b c V1-pos2R31kR1d1n4007 (a) PT1 (b) (c) 2 C1 2(Rectification_Both waves (2).sxsch) (a) PT1 PT1 4 (b) (c) C1 D1C1R1D2AC100 VPT1 a C1R1D4D3D2D1AC100 VPT1 a b c D1-cathoded1n4007 D22R31kR1d1n4007 D1V1C12m5R2P1S1S2TX12R4TX1-10 IPROBE1 2(Rectication_Bridge(2).)
3 Sxsch) (a) PT1 PT1 D1 D2 (b) (c) C1 C2 2 Rectification_Double D1C1R1D2C2R2AC100 VPT1 a b c d1n4007D4d1n4007D3d1n4007D21KR1d1n4007D1 C12mD1-cathodeP1S1TX15R2V12R3V1-pos b D2-anodeC21m1kR42R31kR1d1n4007 D1V1C11mD1-cathode5R2P1S1TX1d1n4007 D2 c (a) PT1 (b) (c) C1 C2 2 Rectification_Bridge_Both (2).sxsch 2 (a) 2 D1 C1 D2 2 + D2D1D4D3C1R1C2R2AC100 VPT1 GND a R1C1D1D2C2AC100 VPT1 a b c D2-anodeC21md1n4007D11KR5d1n4007D2d1n400 7D3d1n4007D4D1-cathode2R31kR1V1C11m5R2P1 S1S2TX12R4TX1-10 (b) V1 2 (c) 2 2 Rectification_Double voltage(2).
4 Sxsch 4 2 4 4 3 2 3 C1C2D2D1D3D4C4C3R1AC100 VPT1 +-D1C1D2R1C2D3C3AC100 VPT1 b C21mD1-cathodeC11mV1d1n4007 D11kR1V1-posd1n4007 D2 c 5 3 5 (1) / /FET CQ +-D1C1D2R1D3C2C3C4C5D4D5AC100 VPT1 CDTLab (Circuit Design Technology Laboratory)
