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Chapter 1: Introduction to PIC18 The PIC18 Microcontroller ...

The PIC18 MicrocontrollerChapter 1: Introduction to PIC18 The PIC18 MicrocontrollerHan-Way HuangMinnesota State University MankatoMinnesota State University, MankatoH. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerWhat is a computer?SoftwareHardwareHardwareCompute r Hardware OrganizationProcessorControl UnitCo m m on Bus (address, data, & co ntrol)DatapathArithm eticLogic UnitMemoryRegistersProgramStorageDataSto rageOutputUnitsInputUnitsH. Huang Transparency @ 2005 Thomson Delmar LearningFigure 1 .1 Com puter Organizatio nThe PIC18 MicrocontrollerThThe processorRegisters -- storage locations in the processorArithmetic logic unitArithmetic logic unitControl unitprogram countercontains the address of the next instruction to be executedpgstatus registerflags the instruction execution resultThe microprocessorA processor implemented on a very large scale integration (VLSI) chipPeripheral chips are needed to construct a productThe MicrocontrollerThe processor and peripheral functions implemented on one VLSI chipH.

The PIC18 Microcontroller n e r latch latch b yte y te e t er er 2 er 3 o inter 0 0 (to GPRs) r0 (to GPRs) gh byte w byte inter 1 1 (to GPRs) 1 (to GPRs) 1

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Transcription of Chapter 1: Introduction to PIC18 The PIC18 Microcontroller ...

1 The PIC18 MicrocontrollerChapter 1: Introduction to PIC18 The PIC18 MicrocontrollerHan-Way HuangMinnesota State University MankatoMinnesota State University, MankatoH. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerWhat is a computer?SoftwareHardwareHardwareCompute r Hardware OrganizationProcessorControl UnitCo m m on Bus (address, data, & co ntrol)DatapathArithm eticLogic UnitMemoryRegistersProgramStorageDataSto rageOutputUnitsInputUnitsH. Huang Transparency @ 2005 Thomson Delmar LearningFigure 1 .1 Com puter Organizatio nThe PIC18 MicrocontrollerThThe processorRegisters -- storage locations in the processorArithmetic logic unitArithmetic logic unitControl unitprogram countercontains the address of the next instruction to be executedpgstatus registerflags the instruction execution resultThe microprocessorA processor implemented on a very large scale integration (VLSI) chipPeripheral chips are needed to construct a productThe MicrocontrollerThe processor and peripheral functions implemented on one VLSI chipH.

2 Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerFeatures of the PIC18 microcontrollerFeatures of the PIC18 Microcontroller -8-bit CPU-2 MB program memory space-256 bytes to 1KB of data EEPROM-Up to 3968 bytes of on-chip SRAM-4 KB to 128KB flash program memory-Sophisticated timer functions that include: input capture, output compare,PWM, real-time interrupt, and watchdog timer-Serial communication interfaces: SCI SPI I2C and CANS erial communication interfaces: SCI, SPI, I2C, and CAN-Background debug mode (BDM)- 10-bit A/D converterMt tibilit-Memory protection capability-Instruction pipelining-Operates at up to 40 MHz crystal oscillatorH. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerEmbedded SystemsEmbedded Systems- A product that uses one or more microcontrollers as controller (s).- End users are only interested in the functionality of the product but not on the Microcontroller Cell phones, home security system, automobiles, and many other products are examples of embedded Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerSemiconductor memoryy Random-access memory(RAM): same amount of time is required to access any location on the same chipRdl(ROM)l bd b ttittt b th Read-only memory(ROM): can only be read but not written to by the processorRandom-access memory Dynamic random-access memory(DRAM): need periodic refresh Static random-access memory(SRAM): no periodic refresh is requiredRead-only memory Mask-programmed read-only memory(MROM): programmed when beingMaskprogrammed readonly memory(MROM): programmed when being manufactured Programmable read-only memory(PROM): can be programmed by the end userH.

3 Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerErasable programmable ROM (EPROM)Erasable programmable ROM (EPROM) 1. electrically programmable many times2. erased by ultraviolet light (through a window)3bliblk(hl hiiti )3. erasable in bulk (whole chip in one erasure operation)Electrically erasable programmable ROM (EEPROM)1. electrically programmable many times2. electrically erasable many times3. can be erased one location, one row, or whole chip in one operationFlash memory1. electrically programmable many times2. electrically erasable many times3. can only be erased in bulk (either a block or the whole chip)H. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerComputer software-Computer programs are known as software-A program is a sequence of instructionsMachine instruction-A sequence of binary digits which can be executed by the processordddddb f hbi-Hard to understand, program.

4 And debug for human beingAssembly language-Defined by assembly instructions-An assembly instruction is a mnemonic representation of a machine instructionAbltb tltdbfitbtd-Assembly programs must be translated before it can be executed --translated by an assembler-Programmers need to work on the program logic at a very low level and can t achieve high Huang Transparency @ 2005 Thomson Delmar LearninggpyThe PIC18 MicrocontrollerHigh-level languageHigh-level language-Syntax of a high-level language is similar to English-A translator is required to translate the program written in a high-level language -- done by a compiler-Allows the user to work on the program logic at higher codeSource code-A program written in assembly or high-level languageObject code-The output of an assembler or compilerH. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerSource code and object code examplesaddress object code line codej----------------------------------- ---------------------------------------- -------------------00001E 0E06 00010 movlw 0x06000020 6E11 00011 movwf 0x11,A,000022 0E07 00012 movlw 0x07000024 6E12 00013 movwf 0x12,A000026 0E08 00014 movlw 0x080000 6008000ov w008000028 6E13 00015 movwf 0x13,A00002A 0E05 00016 movlw 0x0500002C5E1000017subwf0x10,F,A00002C 5E10 00017 subwf 0x10,F,A00002E 5E11 00018 subwf x11,F,AH.

5 Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerRadix Specificationp- Hexadecimal (or hex) number is specified by adding the prefix 0xor by enclosing the number with single quotes and preceding it by an `2040 are hex numbers-0x02, 0x1234, H 2040 are hex numbers- Decimal numbers are enclosed by single quotes and preceded by letter `10 and D`123 are decimal numbers- Octal and binary numbers are similarly `234 is an octal number; B 01011100 is a binary number. H. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerMemory Addressing-Memory consists of a sequence of directly addressable location is referred to as an information memory location can be used to store data, instruction, and the statusof peripheral memory location has two components: an addressand its The components of a memory locationH. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerThe PIC18 Memory Organization-Data Memory and Program Memory are separatedData Memory and Program Memory are separated-Separation of data memory and program memory makes possible the simultaneous access of data and memory are used as general-purpose registers or special function registers-On-chip Data EEPROM are provided in some PIC18 MCUsppH.

6 Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerSeparation of Data Memory and Program MemoryInside the c chipProgramMemorySpaceDataMemory21-bit progam address12-bit register addressSpace(a portionof thisspace is onthPIC18 CPUS pace(Specialfunctionregisters andlthe cchip)generalpurposeRAM)16-bit instruction bus8-bit data busFigure The PIC18 memory spacesH. Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerPIC18 Data Memory-Implemented in SRAM and consists of general-purpose registersand special-function registers. Both are referred to as data PIC18 MCU may have up to 4096 bytes of data 8 CUay ave up to 096 bytes o datae o Data memory is divided into banks. Each bank has 256 General-purpose registers are used to hold dynamic Special-function registers are used to control the operation of peripheral one bank is active at any time.

7 The active bank is specified by the Bank switching is an overhead and can be error-prone- PIC18 implements the access bankto reduce the problem caused by bank bankconsists of the lowest 96 bytes and the highest 160 bytes of the data memory Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerAccess RAM000h05 FhBSR<3:0>=0000 GPRs05Fh060h0 FFh100h1 FFhGPRsBank 0 Bank 1 0000= 0001200h2 FFh300hGPRsGPRsARAMl000hAccess BankBank 2 Bank 3= 0010= 00113 FFh400hGPRsAccess RAM lowAccess RAM highSFRs000h05Fh060h0 FFhBank 4toBk13 GPRsDFFhE00hEFFhBank 13 Bank 14= 1110 Note. 1. BSR is the 4-bit bank select 15= 1111H. Huang Transparency @ 2005 Thomson Delmar LearningFigure Data memory map for PIC18 devices (redraw with permission of Microchip)The PIC18 MicrocontrollerProgram Memory OrganizationProgram Memory Organization- The program counter (PC) is 21-bit long, which enables the user program to access up to 2 MB of program The PIC18 has a 31-entry return address stack to hold the return address for subroutine After power-on, the PIC18 starts to execute instructions from address The location at address 0x08 is reserved for high-priority interrupt service location at address 0x18 is reserved for low-priority interrupt serviceThe location at address 0x18 is reserved for lowpriority interrupt service Up to 128KB (at present time)

8 Of program memory is inside the MCU t fthi lt dt id fth MCU hi-Part of the program memory is located outside of the MCU Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 MicrocontrollerPC<20:0>21stack level 1stack level le v e l 31000000h000008hReset VectorH igh P riority Interrupt Vector000018hL ow P riority Interrupt Vectory SpaceO n-chip and externalyxxxxxhUser Memoryprogram memory1 FFFFFhU nim plem entedprogram memoryRead '0'H. Huang Transparency @ 2005 Thomson Delmar Learning1 FFFFFhF igure P IC 18 P rogram m em ory O rganization (redraw w ith perm ission ofM icrochip)Note. y can be 0 or 1 w hereas x can be 0-FThe PIC18 MicrocontrollerThe PIC18 CPU RegisterThe PIC18 CPU Register- The group of registers from 0xFD8 to 0xFFF are dedicated to the general control of MCU CPU registers are listed in Table The WREG register is involved in the execution of many STATUS register holds the status flags for the instruction execution and isThe STATUS register holds the status flags for the instruction execution and is shown in Figure Huang Transparency @ 2005 Thomson Delmar LearningThe PIC18 Microcontrollerner latch latchbyteyteeterter 2ter 3ointer 0 0 (to GPRs)r 0 (to GPRs)0 (to GPRs)gh bytew byteointer 1 1 (to GPRs)r 1 (to GPRs)1 (to GPRs)gh bytew byteointer 2 2 (to GPRs)r 2 (to GPRs)2 (to GPRs)gh bytew byteDescriptionack (upper)ack (high)ack (low)

9 Nterrogram countegram counter counter low binter upper byinter high byteinter low bytechduct registerduct register control regist control regist control registile register poement pointerement pointerment pointer 0EG to FSR0t register 0 hit register 0 low registerile register poement pointerement pointerment pointer 1EG to FSR1t register 1 hit register 1 lowect registerile register poement pointerement pointerment pointer 2EG to FSR2t register 2 hit register 2 lowgosteristers1)1))1)1))1)(1))Top of staTop of staTop of staStack poiUpper prHigh proProgram Table poiTable poiTable poiTable latcHigh proLow prodInterruptInterruptInterruptIndirect fPost increPost decrPreincremAdd WREFile selectFile selectWorking Indirect fPost increPost decrPreincremAdd WREFile selectFile selectBank seleIndirect fPost increPost decrPreincremAdd WREFile selectFile selectStatus regsical regiserC18 CPU regNameTOSUTOSHTOSLSTKPTRPCLATUPCLATHPCL TBLPTRUTBLPTRHTBLPTRLTABLATPRODHPRODLINT CONINTCON2 INTCON3 INDF0 (1)POSTINC0 (1 POSTDEC0 (PREINC0 (1)PLUSW0 (1)FSR0 HFSR0 LWREGINDF1 (1)POSTINC1 (1 POSTDEC1 (PREINC1 (1)PLUSW1 (1)FSR1 HFSR1 LBSRINDF2 (1)POSTINC2 (1 POSRDEC2 (PREINC2 (1)PLUSW2 (1)

10 FSR2 HFSR2 LSTATUS is not a physTable PICaddress0xFFF0xFFE0xFFD0xFFC0xFFB0xFFA 0xFF90xFF80xFF70xFF60xFF50xFF40xFF30xFF2 0xFF10xFF00xFEF0xFEE0xFED0xFEC0xFEB0xFEA 0xFE90xFE80xFE70xFE60xFE50xFE40xFE30xFE2 0xFE10xFE00xFDF0xFDE0xFDD0xFDC0xFDB0xFDA 0xFD90xFD8 Note 1. This H. Huang Transparency @ 2005 Thomson Delmar LearningTNThe PIC18 Microcontrollerip) )3 of hasLF)w order bit0ssion of MicrochiZDCmeticoperation is zerooperation is not zBWF of the result or bit of the result r rotate (RRF, RLer the bit 4 or bit BWF bit of the resulant bit of the resur rotate (RRF, RLer the high or low21draw with permisNOVnegativepositived for signed arithmrredithmetic or logic oithmetic or logic oitW, SUBLW, SUBhe 4th low-order the 4th low-orderty is reversed. Foloaded with eitheW, SUBLW, SUBhe most significanthe most significty is reversed. Foloaded with eithe43ster (0xFD8) (red----tive bitithmetic result is ithmetic result is erflow bitverflow occurredo overflow occurflaghe result of an arihe result of an ariit carry/borrow biDDWF, ADDLW carry-out from tho carry-out from orrow, the polaritctions, this bit is e bitDDWF, ADDLW carry-out from tho carry-out from , the polaritctions, this bit is source STATUS regi--N: Negat 1 = ari 0 = ariOV: Ove 1 = Ov 0 = NoZ: Zero f 1 = Th 0 = ThDC: Digi For AD 1 = A 0 = No For bo instruc sourceC: Carry/ For AD 1 = A 0 = No oc For bo instruc of the 7 Figure ThH.


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