Transcription of CPLD概論 - khvs.tc.edu.tw
1 CPLD 1-1 CPLD 1-2 CPLD 1-3 CPLD 1-4 1-2 1-1 CPLD CPLD (Complex Programmable Logic Device; CPLD) PLD(Programmable Logic Device; PLD) CPU IC IC IC CPLD IC CPLD CPLD CPLD IC IC IC IC IC IC CPLD CPLD 1-2 CPLD (gate count) CPLD CPLD ( ) ( ) CPLD CPLD ( ) AT M E L CPLD 1000 CPLD CPLD 1-3 1 CPLD CPLD 1.
2 2. (HDL) VHDL AHDL 3. CPLD IC CPLD 1-3 CPLD ALTERA ALTERA CPLD MAX+PLUSII (HDL) AHDL ALTERA CPLD MAX3000/7000 APEX20K FELX6K/10K ACEX1K AT M E L AT M E L CPLD CPLD ALTERA XILIXN AT M E L Lattice-Vantis Lattice (In-System Programming ISP) ( ) PLD CPLD PLD ispLSI2000/5000/8000 MACH4/5 XILIXN XILIXN (Field Programmable Gate Array FPGA) PLD CPLD Coolrunner Spartan Ve r t e x XC9500/4000 1-4 1-4 CPLD ( ) CPLD ( ) CPLD ( ) ( ) (04-7384943)
3 CPLD CPLD 1. CPLD PLCC 2. 84 44 PLCC IC CPLD 3. ( ) 4. I/O 5V 5. 1. ( )CPLD CPLD 2. ALTERA EPM7128 SLC84 EPM7064 SLC44 AT M E L ATF1508 AT F 1 5 0 4 3. I/O PIN PIN 4. IC CLK1 PIN 5. ADAPTER 5V VCCIN PIN 6. I/O ADAPTER 5V VCCIO PIN 5V (EPM7128 SLC84 VCCIO 1-5 1 CPLD I/O 5V ) 7. 25 TO 9 DOWNLOADER 9 TO 9 8. AT M E L EPM7128 SLC84 EPM7064 SLC44 ALTERA MAX+PLUS II ( ByteBlaster) 9. AT M E L ATF1508 ATF1504 AT M E L POF2 JED AT M I S P POF2 JED MAX+PLUS II POF JED AT M I S P ( ByteBlaster) 10.
4 ALTERA (http ) AT M E L (http ) (ALTERA MAX+PLUS II AT M E L POF2 JED AT M E L I S P ) (EPM7128 AT F 1 5 0 8 ) 4 SW3 11 DIPB3 20 DIPA1 28 DIPA7 35 E0 5 SW2 12 DIPB4 21 DIPA2 29 DIPA8 36 F0 6 SW2 15 DIPB5 22 DIPA3 30 A0 37 G0 8 SW0 16 DIPB6 24 DIPA4 31 B0 39 DOT0 9 DIPB1 17 DIPB7 25 DIPA5 33 C0 40 A1 10 DIPB2 18 DIPB8 27 DIPA6 34 D0 41 B1 44 C1 51 A2 58 G2 67 E3 75 DG2 45 D1 52 B2 60 DOT268 F3 76 DG3 46 E1 54 C2 61 A3 69 G3 77 DG4 48 F1 55 D2 63 B3 70 DOT379 DG5 49 G1 56 E2 64 C3 73 DG080 DG6 50 DOT1 57 F2 65 D3 74 DG181 DG7 SW DIP A~G DOT DR0~ DR7 ( A3~DOT3 ) DG0~ DG7 1-6 CPLD CPLD 1-1 1-1 CPLD PIN 1.
5 VCCIN Adaptor VCCIN 5V Adaptor VCCIN 5V 2. VCCIO Adaptor IO 5V 5V TTL VCCIO 5V IC 3. CLK CLK1 CLK1 83 PIN CLK 43 PIN CLK 4. CLK2 CLK2 2 PIN CLK 2 PIN CLK 1-7 1 CPLD 1-2 84 CPLD 60 4 SW3~SW0( 4,5,6,8) B DIPB1~DIPB8( 9,10,11,12,15,16,17,18 ) A DIPA1~DIPA8( 20,21,22,24,25,27, 28,29) (0,1,2,3) 16 ( DR0~DR7 DG0~DG7) 0 (DIS0) A0~F0 DOT0( 30,31,33,34,35,36,37,39 ) 1 (DIS1) A1~F1 DOT1( 40,41,44,45,46,48,49,50 ) 2 (DIS2) A2~F2 DOT2( 51,52,54,55,56,57,58,60 ) 3 (DIS3) A3~F3 DOT2( 61,63,64,65,67,68,69,70) DR0~DR7 ( 61,63,64,65,67,68,69,70) DG0~DG7( 73,74,75,76,77, 79,80,81) (DIS3) 61,63,64,65,67,68,69,70 (DIS3) (1) (2)
6 9 Pin RS-232 9 Pin to 25 Pin 1-8 (3) ( ) ( ) ( ALTERA *.POF AT M E L *.JED ) ( ) ( AT M E L AT M E L I S P )