DAC8560 16-Bit, Ultra-Low Glitch, Voltage Output …

1 DAC Register1616-Bit DACRef (+) RegisterGNDSYNCSCLKDINPWDC ontrolResistorNetwork16 ProductFolderOrderNowTechnicalDocumentsT ools &SoftwareSupport &CommunityReferenceDesignAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand DECEMBER2006 REVISEDJANUARY2018 DAC856016-Bit, ultra -LowGlitch,VoltageOut putDigital-to-AnalogConverterWith , 2-ppm/ C InternalReference11 Features1 RelativeAccuracy:4 LSB MicroPowerOperation:510 A at V InternalReference: (Enabledby Default) 2-ppm/ C TemperatureDrift (Typical) 5-ppm/ C TemperatureDrift (Maximum) 20-mASink/SourceCapability Power-OnResetto Zero V to V 16-BitMonotonicOverTemperatureRange SettlingTime:10 s to Low-PowerSerialInterfaceWithSchmitt-Trig geredInputs On-ChipOutputBufferAmplifierWithRail-to- RailOperation Power-DownCapability Drop-InCompatibleWithDAC8531/01 andDAC8550/51 TemperatureRange.

2 40 C to +105 C Availablein a Tiny 8-PinVSSOPP ackage2 Applications ProcessControl DataAcquisitionSystems Closed-LoopServo-Control PC Peripherals PortableInstrumentation3 DescriptionThe DAC8560is a low-power,voltageoutput,16-bitdigital-to -analogconverter(DAC).TheDAC8560includes a ,2-ppm/ C internalreference(enabledby default),givinga full-scaleoutputvoltagerangeof 0 V to V. The internalreferencehas aninitialaccuracyof can sourceup to 20 mAat the VREFpin. Thedeviceis monotonic,providesvery goodlinearity,and minimizesundesiredcode-to-codetransientv oltages( glitch ).The DAC8560usesaversatile3-wireserialinterfa cethat operatesat clockratesup to 30 is compatiblewithstandardSPI,QSPI,Microwire ,anddigital-signal-processor(DSP) DAC8560incorporatesa power-on-reset(POR)circuitthat ensuresthe DACoutputpowersup at zeroscaleand remainsthereuntil a validcodeis writtentothe power-downfeature,accessedoverthe serialinterface,thatreducesthe currentconsumptionof the A at 5 low-powerconsumption,internalreference,a ndsmallfootprintmakethis deviceidealfor portable, powerconsumptionis mW at 5 V, reducingto 6 W in availablein an (1)PARTNUMBERPACKAGEBODYSIZE(NOM) DAC8560 VSSOP(8) (1)

3 For all availablepackages,see the orderableaddendumatthe end of the DECEMBER2006 : DAC8560 SubmitDocumentationFeedbackCopyright 2006 2018,TexasInstrumentsIncorporatedTableof Contents1 Pin Configurationand :DACat VDD= 5 :DACat VDD= :DACat VDD= Applicationand Deviceand Mechanical,Packaging,and RevisionHistoryNOTE:Pagenumbersfor previousrevisionsmay differfrompagenumbersin the (November2011)to RevisionCPage Addedtopnavlink for TI Designs,DeviceInformation,ESDR atings,RecommendedOperatingConditions, andThermalInformationtables,FeatureDescr iptionsection,DeviceFunctionalModes,Appl icationand Implementationsection,PowerSupplyRecomme ndationssection,Layoutsection,Deviceand DocumentationSupportsection,andMechanica l,Packaging,and (November2011)to RevisionBPage ChangedRevisiondatefromA, May 2011to B, Changed"Zero-codeerrordrift" in the ELECCHARA table,TYPfrom 20 to (December2006)to RevisionAPage , ChangedInitialAccuracyparametermin/maxva luesfrom and , (May2011)

4 To RevisionBPage ChangedRevisiondatefromA, May 2011to B, Changed"Zero-codeerrordrift" in the ELECCHARA table,TYPfrom 20 to DECEMBER2006 REVISEDJANUARY2018 ProductFolderLinks: DAC8560 SubmitDocumentationFeedbackCopyright 2006 2018,TexasInstrumentsIncorporated5 Pin Configurationand FunctionsDGKP ackage8-PinVSSOPTop ViewPin , V to V2 VREFI/OReferencevoltageinput/output3 VFBIF eedbackconnectionfor the voltageoutputoperation,tie to outputamplifierhas (activeLOW).This is the framesynchronizationsignalfor the ,it enablesthe inputshift register,and datais sampledon DACoutputupdatesfollowingthe SYNCis takenHIGH beforethe24thclockedge,the risingedgeof SYNC acts as an interrupt,and the writesequenceis ignoredbythe , clockedinto the 24-bitinputshift registeron eachfallingedgeof the all circuitryon the DECEMBER2006 : DAC8560 SubmitDocumentationFeedbackCopyright 2006 2018,TexasInstrumentsIncorporated(1)Stre ssesbeyondthoselistedunderAbsoluteMaximu mRatingsmay causepermanentdamageto the stressratingsonly,whichdo not implyfunctionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder RecommendedOperatingConditions.

5 Exposureto absolute-maximum-ratedconditionsfor extendedperiodsmay (unlessotherwisenoted)(1)MINMAXUNITVDDto GND GND + GND + (DGK)(TJ(MAX) TA) / R JAOperatingtemperature 40105 CJunctiontemperature,TJ(MAX)150 CStoragetemperature,Tstg 65150 C(1)JEDEC documentJEP155statesthat 500-VHBM allowssafe manufacturingwith a standardESDcontrolprocess.(2)JEDEC documentJEP157statesthat 250-VCDM allowssafe manufacturingwith a (ESD)ElectrostaticdischargeHuman-bodymod el(HBM),per ANSI/ESDA/JEDECJS-001(1) 4000 VCharged-devicemodel(CDM),per JEDEC specificationJESD22-C101(2) (unlessotherwisenoted)MINNOMMAXUNITVDDS upplyvoltage(VDDto GND) (DIN, SCLK,and SYNC)0 VDDVVFBO utputamplifierfeedbackinputVOUTVTAO peratingambienttemperature 40125 C(1)For moreinformationabouttraditionaland new thermalmetrics,see theSemiconductorand IC (1) DAC8560 UNITDGK(VSSOP)8 PINSR JAJunction-to-ambientthermalresistance20 6 C/WR JC(top)Junction-to-case(top)thermalresis tance44 C/WR C/W C/W DECEMBER2006 REVISEDJANUARY2018 ProductFolderLinks.

6 DAC8560 SubmitDocumentationFeedbackCopyright 2006 2018,TexasInstrumentsIncorporated(1)Line aritycalculatedusinga reducedcoderangeof 485 to 64714;outputunloaded.(2)Ensuredby designand characterization,not V to V, 40 C to +105 C range(unlessotherwisenoted)PARAMETERTEST CONDITIONSMINTYPMAXUNITSTATICPERFORMANCE (1)Resolution16 BitsRelativeaccuracyMeasuredby line passingthroughcodes485 and 64714 DAC8560A,DAC8560C 4 12 LSBDAC8560B,DAC8560D 4 8 LSBD ifferentialnonlinearity16-bitMonotonic 1 LSBZero-codeerrorMeasuredby line passingthroughcodes485 and 64714. 5 12mVFull-scaleerror of FSRG ainerror of FSRZero-codeerrordrift 4 V/ CGaintemperaturecoefficientVDD= 5 V 1ppmofFSR/ CVDD= V 3 PSRRP owersupplyrejectionratioOutputunloaded1m V/VOUTPUTCHARACTERISTICS(2)Outputvoltage range0 VREFVO utputvoltagesettlingtimeTo ,0200hto FD00h,RL= 2 k ,0 pF < CL< 200 pF810 sRL= 2 k , CL= 500 sCapacitiveload stabilityRL= 470pFRL= 2 k 1000 Codechangeglitchimpulse1 LSB , outputimpedanceAt mid-codeinput1 Short-circuitcurrentVDD= 5 V50mAVDD= 3 V20 Power-uptimeComingout of power-downmodeVDD= 5 sComingout of power-downmodeVDD= 3 V5AC PERFORMANCE(2)

7 SNRTA= 25 C, BW = 20 kHz,VDD= 5 V, fOUT= 1 kHz,1st 19 harmonicsremovedfor SNRcalculation88dBTHD 77dBSFDR79dBSINAD77dBDAC outputnoisedensityTA= 25 C, at mid-codeinput,fOUT= 1 kHz170nV/ HzDACoutputnoiseTA= 25 C, at mid-codeinput, Hz to 10 Hz50 VPP6 DAC8560 SLAS464C DECEMBER2006 : DAC8560 SubmitDocumentationFeedbackCopyright 2006 2018,TexasInstrumentsIncorporatedElectri calCharacteristics(continued)VDD= V to V, 40 C to +105 C range(unlessotherwisenoted)PARAMETERTEST CONDITIONSMINTYPMAXUNIT(3)Referenceis trimmedand testedat roomtemperature,and is characterizedfrom 40 C to +120 C.(4)Referenceis trimmedand testedat two temperatures(25 C and 105 C), and is characterizedfrom 40 C to +120 C.(5)Explainedin moredetailinApplicationand Implementation.

8 (6)Inputcode= 32768,referencecurrentincluded,no 25 25 C ,DAC8560B(3)525ppm/ CDAC8560C,DAC8560D(4)25 Outputvoltagenoisef = Hz to 10 Hz16 VPPO utputvoltagenoisedensity(high-frequencyn oise)TA= 25 C, f = 1 MHz,CL= 0 F125nV/ HzTA= 25 C, f = 1 MHz,CL= 1 F20TA= 25 C, f = 1 MHz,CL= 4 F2 Loadregulation,sourcing(5)TA= 25 C30 V/mALoadregulation,sinking(5)TA= 25 C15 V/mAOutputcurrentloadcapability(2) 20mALine regulationTA= 25 C10 V/VLong-termstability/drift(aging)(5)TA= 25 C, time = 0 to 1900hours50ppmThermalhysteresis(5)Firstc ycle100ppmAdditionalcycles25 REFERENCEI nternalreferencecurrentconsumptionVDD= V360 AVDD= V348 ExternalreferencecurrentExternalVREF= V, if internalreferenceis disabled20 AReferenceinputrange0 VDDVR eferenceinputimpedance125k LOGICINPUTS(2)Inputcurrent 1 AVINLL ogicinputLOWvoltageVDD= 5 3 5 3 (6)NormalmodeVDD= V to V, VIH= VDDand VIL= V to V, VIH= VDDand VIL= power-downmodesVDD= V to V, VIH= VDDand VIL= AVDD= V to V, VIH= VDDand VIL= (6)NormalmodeVDD= V to V to power-downmodesVDD= V to V614 WVDD= V to V28 TEMPERATURERANGES pecifiedperformance 40105 DECEMBER2006 REVISEDJANUARY2018 ProductFolderLinks.

9 DAC8560 SubmitDocumentationFeedbackCopyright 2006 2018,TexasInstrumentsIncorporated(1)All inputsignalsare specifiedwith tR= tF= 3 ns (10%to 90%of VDD) and timedfroma voltagelevelof (VIL+ VIH) / 2.(2)See Figure1.(3)MaximumSCLK frequencyis 3 0 MHzat VDD= V to V and 20 MHzat VDD= V to V to V, all specifications 40 C to +105 C (unlessotherwisenoted)(1) (2)PARAMETERMINNOMMAXUNITt1(3)SCLK cycletimeVDD= V to V50nsVDD= V to V33t2 SCLKHIGH timeVDD= V to V13nsVDD= V to V13t3 SCLKLOW timeVDD= V to V to V13t4 SYNCto SCLK risingedgesetuptimeVDD= V to V0nsVDD= V to V0t5 DatasetuptimeVDD= V to V5nsVDD= V to V5t6 Datahold timeVDD= V to V to SYNC risingedgeVDD= V to V0nsVDD= V to V0t8 MinimumSYNCHIGH timeVDD= V to V50nsVDD= V to V33t924thSCLK fallingedgeto SYNC fallingedgeVDD= V to V100nsVDD= V to V100t10 SYNC risingedgeto 24thSCLK fallingedge(for successfulSYNC interrupt)VDD= V to V15nsVDD= V to V15 Figure1.

10 : CMax: 3ppm/ CPopulation (%)Temperature Drift (ppm/ C)200150100500-50-100-150-20018001900300 600900120015000 Drift (ppm)Time (Hours)20 Units ShownSee the Applications Informationsection for more (%)Temperature Drift (ppm/ C)Typ: 2ppm/ CMax: 5ppm/ C 3020100135791113151719 Population (%)Temperature Drift (ppm/ C) Typ: 5ppm/ CMax: 25ppm/ C (V)REFT emperature ( C) 10 Units (V)REFT emperature ( C) 13 Units Shown8 DAC8560 SLAS464C DECEMBER2006 : DAC8560 SubmitDocumentationFeedbackCopyright 2006 2018,TexasInstrumentsIncorporated(1) :InternalReferenceAt TA= 25 C, InternalReferenceVoltagevs Temperature(GradesC and D)Figure3. InternalReferenceVoltagevs Temperature(GradesA and B)Figure4. ReferenceOutputTemperatureDrift( 40 C to120 C, GradesC and D)Figure5.