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Datasheet - TDA7498 - 100-watt + 100-watt dual BTL class-D ...

PowerSSO-36exposed pad upFeatures 100 W + 100 W output power at THD = 10% with RL = 6 and VCC = 36 V 80 W + 80 W output power at THD = 10% with RL = 8 and VCC = 34 V Wide-range single-supply operation (14 - 39 V) High efficiency ( = 90%) Four selectable, fixed gain settings of nominally dB, dB, dB dB Differential inputs minimize common-mode noise Standby and mute features Short-circuit protection Thermal overload protection Externally synchronizableDescriptionThe TDA7498 is a dual BTL class-D audio amplifier with single power supplydesigned for home systems and active speaker comes in a 36-pin PowerSSO package with exposed pad up (EPU) to facilitatemounting a separate status linkTDA7498 Product summaryOrder codeTDA7498 TRTemperaturerange-40 to 85 CPackagePowerSSO36(EPU)

100-watt + 100-watt dual BTL class-D audio amplifier TDA7498 Datasheet DS6437 - Rev 10 - August 2020 For further information contact your local STMicroelectronics sales office. ... fSW Switching frequency Internal oscillator 290 310 330 kHz fSWR Output switching frequency range With internal oscillator (1) 250 - 400 kHz With external oscillator ...

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Transcription of Datasheet - TDA7498 - 100-watt + 100-watt dual BTL class-D ...

1 PowerSSO-36exposed pad upFeatures 100 W + 100 W output power at THD = 10% with RL = 6 and VCC = 36 V 80 W + 80 W output power at THD = 10% with RL = 8 and VCC = 34 V Wide-range single-supply operation (14 - 39 V) High efficiency ( = 90%) Four selectable, fixed gain settings of nominally dB, dB, dB dB Differential inputs minimize common-mode noise Standby and mute features Short-circuit protection Thermal overload protection Externally synchronizableDescriptionThe TDA7498 is a dual BTL class-D audio amplifier with single power supplydesigned for home systems and active speaker comes in a 36-pin PowerSSO package with exposed pad up (EPU) to facilitatemounting a separate status linkTDA7498 Product summaryOrder codeTDA7498 TRTemperaturerange-40 to 85 CPackagePowerSSO36(EPU)

2 PackingTape and reel100- watt + 100-watt dual BTL class-D audio amplifierTDA7498 DatasheetDS6437 - Rev 10 - August 2020 For further information contact your local STMicroelectronics sales block diagramFigure 1. Internal block diagram (showing one channel only) shows the block diagram of one of the two identicalchannels of the 1. Internal block diagram (showing one channel only) TDA7498 Device block diagramDS6437 - Rev 10page 2/222 Pin 2. Pin connections (top view, PCB view) 1234567891011121314151617182829303132333 43536192021222324252627 VSSSUB_GNDOUTPBOUTPBPGNDBPGNDBPVCCBPVCCB OUTNBOUTNBOUTNAOUTNAPVCCAPVCCAPGNDAPGNDA OUTPAOUTPAPGNDVDDPWSTBYMUTEINPAINNAROSCS YNCLKVDDSSGNDDIAGSVRGAIN0 GAIN1 INPBINNBVREFSVCCEP, exposed padConnect to groundTDA7498 Pin descriptionDS6437 - Rev 10page 3 listTable 1.

3 Pin description listNumberNameTypeDescription1 SUB_GNDPWRC onnect to the frame2,3 OUTPBOP ositive PWM for right channel4,5 PGNDBPWRP ower stage ground for right channel6,7 PVCCBPWRP ower supply for right channel8,9 OUTNBON egative PWM output for right channel10,11 OUTNAON egative PWM output for left channel12,13 PVCCAPWRP ower supply for left channel14,15 PGNDAPWRP ower stage ground for left channel16,17 OUTPAOP ositive PWM output for left channel18 PGNDPWRP ower stage (nominal) regulator output referred to ground for power stage20 STBYIS tandby mode control21 MUTEIMute mode control22 INPAIP ositive differential input of left channel23 INNAIN egative differential input of left channel24 ROSCOM aster oscillator frequency-setting pin25 SYNCLKI/OClock in/out for external (nominal) regulator output referred to ground for signal blocks27 SGNDPWRS ignal ground28 DIAGOOpen-drain diagnostic output29 SVROS upply voltage rejection30 GAIN0 IGain setting input 131 GAIN1 IGain setting input 232 INPBIP ositive differential input of right channel33 INNBIN egative differential input of right channel34 VREFOHalf VDDS (nominal)

4 Referred to ground35 SVCCPWRS ignal power (nominal) regulator output referred to power supply-EP-Exposed pad for heatsink, to be connected to groundTDA7498 Pin listDS6437 - Rev 10page 4/223 Electrical maximum ratingsTable 2. Absolute maximum ratingsSymbolParameterValueUnitVCCDC supply voltage for pins PVCCA, PVCCB, SVCC45 VVIV oltage limits for input pins STBY, MUTE, INNA, INPA, INNB, INPB,GAIN0, to junction temperature-40 to 150 CTstgStorage temperature-40 to 150 dataTable 3. Thermal j-caseThermal resistance, junction to case-23 operating conditionsTable 4. Recommended operating voltage for pins PVCCA, PVCCB, SVCC14-39 VTambAmbient operating temperature-40-85 specificationsUnless otherwise stated, the values in the table below are specified for the conditions: VCC = 36 V, RL = 6 ,ROSC = R3 = 39 k , C8 = 100 nF, f = 1 kHz, GV = dB Tamb = 25 5.

5 Electrical quiescent currentNo LC filter, no load-4060mAIqSTBYQ uiescent current in standby--110 AVOSO utput offset voltagePlay mode-100-100mVMute mode-60-60 IOCPO vercurrent protection thresholdRL = 0 67-ATjJunction temperature at thermalshutdown--150- CRiInput resistanceDifferential input4860-k VOVPO vervoltage protection threshold-4243-VTDA7498 Electrical specificationsDS6437 - Rev 10page 5 protection threshold---8 VRdsONPower transistor on-resistanceHigh Low powerTHD = 10%-100-WTHD = 1%-78-PoOutput powerRL = 8 , THD = 10%-80-WPDD issipated powerPo = 100 W + 100 W,THD = 10%-20-W EfficiencyPo = 100 W + 100 W-90-%THDT otal harmonic distortionPo = 1 gainGAIN0 = L, GAIN1 = = L, GAIN1 = = H, GAIN1 = = H, GAIN1 = GVGain matching--1-1dBCTC rosstalkf = 1 kHz, Po = 1 W5070-dBeNTotal input noiseA Curve, GV = 20 dB-15- Vf = 22 Hz to 22 kHz-2550 SVRRS upply voltage rejection ratiofr = 100 Hz, Vr = Vpp, CSVR= 10 F-70-dBTr, TfRise and fall times--50-nsfSWSwitching frequencyInternal oscillator290310330kHzfSWRO utput switching frequency rangeWith internal oscillator (1)250-400kHzWith external oscillator (2)250-400 VinHDigital input high (H) input low (L) STBY voltage high (H) STBY voltage low (L) MUTE voltage high (H)

6 MUTE voltage low (L) attenuationVMUTE = L, VSTBY = H-70-dB = 106 / ((16 * ROSC + 182) * 4) kHz, fSYNCLK = 2 * fSW with R3 = 39 k (see Figure 19. Application circuit for 6 or 8 speakers).2. fSW = fSYNCLK / 2 with the external oscillator. TDA7498 Electrical specificationsDS6437 - Rev 10page 6/224 Characterization circuitFigure 3. Test circuit for characterizations shows the test circuit with which the characterization curves, shown inthe next sections, were measured. Figure 4. Test board shows the PCB 3. Test circuit for characterizationsL+R+R-VCCGNDL+L-R+R-TDA 7498 MUTESTBY3V3 POWER SUPPLYS ingle-Ended **InputCLASS-D AMPLIFIER **Single-Ended InputLoad = 6 ohmFor For FREQUENCY SHIFTOUTPUTINPUTL-*LC FILTER COMPONENTSLoadL1,L2,L3,L4C20,C26C18,C22, C24,C286 ohm8 ohm22 uH22 uH470 nF680 nF220 nF220 +C232200uF50VL322uHL122uHL222uHJ4C301uFC 311uFR14100kR158RC28220nFR168RC24220nFR1 78RC18220nFR188RC22220nF1234J32413J1R134 7kC131nF+ + (S)DIAGVCC3V33V3 FSFSVDDSVDDSTDA7498 Characterization curvesDS6437 - Rev 10page 7/22 Figure 4.

7 Test curvesUnless otherwise stated the measurements were made under the following conditions:VCC = 36 V, f = 1 kHz, GV = dB, ROSC = 39 k , COSC = 100 nF, Tamb = 25 CTDA7498 Characterization curvesDS6437 - Rev 10page 8 RL = 6 Figure 5. Output power (THD = 10%) vs. supplyvoltage101202030405060708090100110 Output powe r (W)+10+36+12 +14 +16 +18+20 +22 +24 +26 +28+30 +32 +34 Supply voltage (V)Figure 6. THD vs. output +N (%)100m200200m500m125102050100 Output powe r (W)f = 1 kHzf = 100 HzFigure 7. THD vs. frequency (1 W)THD+N (%)2020k501002005001k2k5k10kFrequency (Hz) 8. THD vs. frequency (100 mW) +N (%)2020k501002005001k2k5k10kFrequency (Hz)Figure 9.

8 Frequency response-3+ +0+ +1+ +2+ (dB)1020k20501002005001k2k5k10kFrequency (Hz)Figure 10. FFT performance (0 dBFS)FFT (dB)2020k501002005001k2k5k10kFrequency (Hz)-180+0-170-160-150-140-130-120-110-1 00-90-80-70-60-50-40-30-20-10 Figure 11. FFT performance (-60 dBFS)FFT (dB)2020k501002005001k2k5k10kFrequency (Hz)-180+0-170-160-150-140-130-120-110-1 00-90-80-70-60-50-40-30-20-10 TDA7498 Characterization curvesDS6437 - Rev 10page 9 RL = 8 Figure 12. Output power (THD = 10%) vs. supplyvoltage101202030405060708090100110 Output powe r (W)+10+36+12 +14 +16 +18+20 +22 +24 +26 +28+30 +32 +34 Supply voltage (V)Figure 13. THD vs. output +N (%)100m200200m500m125102050100 Output powe r (W)f = 1 kHzf = 100 HzFigure 14.

9 THD vs. frequency (1 W)THD+N (%)2020k501002005001k2k5k10kFrequency (Hz) 15. THD vs. frequency (100 mW)THD+N (%)2020k501002005001k2k5k10kFrequency (Hz) 16. Frequency response-3+ +0+ +1+ +2+ (dB)1020k20501002005001k2k5k10kFrequency (Hz)Figure 17. FFT performance (0 dB)Figure 18. FFT performance (-60 dB)FFT (dB)2020k501002005001k2k5k10kFrequency (Hz)-180+0-170-160-150-140-130-120-110-1 00-90-80-70-60-50-40-30-20-10 TDA7498 Characterization curvesDS6437 - Rev 10page 10/225 Application circuitFigure 19. Application circuit for 6 or 8 speakersL+R+R-VCCGNDL+L-R+R- TDA7498 MUTESTBY3V3 POWER SUPPLYS ingle-Ended **InputCLASS-D AMPLIFIER **Single-Ended InputLoad = 6 ohmFor For FREQUENCY SHIFTOUTPUTINPUTL-*LC FILTER COMPONENTSLoadL1,L2,L3,L4C20,C26C18,C22, C24,C286 ohm8 ohm22 uH22 uH470 nF680 nF220 nF220 +C232200uF50VL322uHL122uHL222uHJ4C301uFC 311uFR14100kR158RC28220nFR168RC24220nFR1 78RC18220nFR188RC22220nF1234J32413J1R134 7kC131nF+ + (S) selectionThe three operating modes of the TDA7498 are set by the two inputs, STBY (pin 20) and MUTE (pin 21).

10 Standby mode: all circuits are turned off, very low current consumption. Mute mode: inputs are connected to ground and the positive and negative PWM outputs are at 50% dutycycle. Play mode: the amplifiers are protection functions of the TDA7498 are enabled by pulling down the voltages of the STBY and MUTE inputsshown in Figure 20. Standby and mute circuits. The input current of the corresponding pins must be limited to 200 6. Mode settingsModeSTBYMUTES tandbyL (1)X (don t care)MuteH (1)LPlayHH 1. Drive levels defined in Table 5. Electrical specifications TDA7498 Application informationDS6437 - Rev 10page 11/22 Figure 20. Standby and mute circuitsSTBYMUTE0 FR230 k Standby0 FR430 k MuteTDA7498 Figure 21.


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